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AI-assisted IP & SoC Verification: Making It Right
Francois Cerisier - CEO - AEDVICES
Biography :
| François Cerisier is the founder and CEO of AEDVICES, delivering design and verification services, consulting and trainings for the semiconductor and embedded systems industries. With over 25 years of experience, he works across all stages of IP and SoC verification, from methodology setup and planning to testbench development and coverage closure. His expertise includes SystemVerilog, UVM, formal verification, and hardware/software co-verification. He has contributed to projects for major semiconductor players and supported EDA vendors with verification IPs, methodology coaching, and tool integration. François is also a committed trainer and lecturer, teaching verification techniques at engineering schools such as Grenoble INP and Esisar. He is particularly interested in the practical use of AI and LLMs in verification, promoting a careful, critical, methodology-driven approach. |
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