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Mastering UCIe 2.0: Overcoming Fabric Management Hurdles for Chiplet Integration
Prashant Dixit - Siemens EDA (Avery Design)
Biography :
| Prashant Dixit, Architect, is currently working in developing the Verification solutions for UCIe at Siemens EDA. He also manages the Verification IPs team which deals with the development, testing and deployment of CXL, NVMe over PCIe and over Fabrics solutions. Prior to his role at Siemens EDA, Prashant gained valuable experience at Samsung, where he contributed to the design and verification of IPs and SoC of networking and storage domains. He has completed his Master of Engineering in Microelectronics from BITS Pilani in 2006 and Bachelor of Technology in Electronics and Communication from Uttar Pradesh Technical University in 2004. |
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