Cypress Aims Low-Pin Memory at Automotive, IoT

By Gary Hilson, EETimes, TORONTO, Jul. 18, 2016 – 

Two attributes that are considered highly desirable in memory for the burgeoning automotive and Internet of Things (IoT) markets are a small footprint and low power consumption, but in the automotive market in particular, simpler is also better.

Cypress Semiconductor's recent update to its HyperRAM memory DRAM device is addressing the automotive industry's preference for fewer moving pieces with a lower pin count. The company is now sampling its new high-speed, self-refresh DRAM based on its low-pin-count HyperBus interface.

The 64Mb HyperRAM is designed to serve as an expanded scratchpad memory for rendering of high-resolution graphics or calculations of data-intensive firmware algorithms in a wide array of automotive, industrial and consumer applications, said Rainer Hoehler, VP of the flash business unit at Cypress, in an interview with EE Times. Microcontrollers often do not have enough integrated memory for high-resolution graphics or data-intensive firmware algorithms.

 Back