|
|
|
www.design-reuse-embedded.com |
|
€8m project for Europe's first RISC-V supercomputer chip
A European project is developing a high performance RISC-V processor for supercomputer designs and derivatives for automotive and edge IoT.
www.eenewseurope.com, Jun. 18, 2021 –
The €8m eProcessor project is using a high-performance Out-of-Order (OoO) processor core based on the RISC-V instruction set architecture as the first high performance computing ecosystem.
The three year project is led by the Barcelona Supercomputing Centre and is supported by Euro HPC funding with a core developed by French designer Cortus and participation from Thales in France and Exapsys in Greece.
eProcessor members Extoll in Germany and Chalmers University in Sweden as well as the Barcelona Centre are also part of another supercomputer chip development using the ARM architecture with RISC-V accelerators for the European Processor Initiative (EPI).
The Cortus RISC-V processor core contributed to the eProcessor project includes full cache coherency to enable large scale systems with a very large numbers of processors for a full scale supercomputer. The design includes adaptive on-chip memory structures and management as well as fault tolerance features and the development spans the full stack from applications to runtimes, tools, OS, and the CPU and accelerators.
Back
Contact Us
Partnership Offers