The CertusPro-NX: Lattice Leverages FD-SOI for New Low Power FPGAs

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AAC sat down with Lattice Semiconductor to hear about its newest FPGA offering, which claims lower power compared to competitors. However, how does it back up this claim?

allaboutcircuits.com, Jun. 23, 2021 – 

In many of the world's electronic applications today, low power is the name of the game. However, high levels of integration and device scaling have created a power/performance/reliability tradeoff that has mostly halted traditional power scaling methods.

One technology used in the industry to mitigate this tradeoff is fully depleted silicon-on-insulator (FD-SOI) technology which can operate at 75% lower power as compared to a bulk CMOS process. Lattice Semiconductor continues to reap the benefits of FD-SOI with its newest FPGA offerings. These offerings claim to be some of the company's lowest power yet, and they cite FD-SOI as a key source.

This week, All About Circuits had the chance to sit down with JuJu Joyce, Product Marketing Manager from Lattice, to hear about the new offerings and how they stack up to the competition, first hand.

A History of Scaling and Power Consumption

Historically, decreasing power consumption in a digital IC was reasonably straightforward. Directly from the classic dynamic power equation, it was clear to see that dynamic power consumption would decrease with the square of the supply voltage.

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