www.design-reuse-embedded.com
Find Top SoC Solutions
for AI, Automotive, IoT, Security, Audio & Video...

Brite Semiconductor provides xSPI/Hyperbus™/Xcella™ controller and PHY total solution

Aug. 05, 2022 – 

Shanghai, China — Aug.5, 2022 — Brite Semiconductor (“Brite”), a leading custom ASIC & IP provider, today announced providing xSPI/HyperbusTM/XcellaTM memory (Flash, PSRAM, MRAM…) controller and PHY solution for custom SoC. This solution is verified using memories from memory manufactures such as GigaDevice, APMemory, Cypress (Infineon), Micron, Macronix etc., which can support customers to develop better products faster in different fields.

The eXpanded Serial Peripheral Interface (xSPI) JESD251 standard, ratified by JEDEC in July 2018, defines a high-data throughput, serial interface for memory. It provides high data throughput, low pin count and is primarily for use in computing, automotive, Internet of Things (IOT), embedded systems and mobile systems, between host processing and peripheral devices. The xSPI electrical interface can deliver up to 400MT/s raw data throughput. It is mainly for nonvolatile memory devices for example NOR flash, NAND flash, a large number of memory vendors adopt it for PSRAM (Pseudo SRAM) or MRAM (Magnetic RAM). It is extensible for a higher data rate based on either a high data rate per bit or a wider data path,achieving 800MT/s.

Brite Semiconductor now can provide a total solution of xSPI controller and PHY for the advanced memory and also legacy Octal SPI, QSPI and SPI device. We adopt auto-flow-control technology to minimize the FIFO/SRAM utilization. Also another innovative feedback-sampling technology is used to increase the data rate which doesn’t have a DS, achieving maximum 400MT/s in 8D mode without DS. The solution has the following features:

Note: HyperbusTM is a trademark of Cypress(Infineon), XcellaTM is a trademark of Micron.

"There is a greater demand of high throughput and low pin count for Industrial IoT, Automotive and Edge AI applications, the emergence of xSPI memory can meet such requirement,” said Yadong Liu, VP of Engineering at Brite Semiconductor. “In addition, Brite Semiconductor expands the DDR technologies to xSPI, adopting auto-flow-control and feedback-sampling technologies to achieve low area and high data rate, then provides the total solution of xSPI memory controller for the custom SoC."

About Brite Semiconductor

Brite Semiconductor is a leading custom ASIC and IP provider, and committed to provide flexible one-stop services from architecture design to chip delivery with high value and differentiated solutions.

Brite Semiconductor provides comprehensive silicon proven “YOU” IP portfolio and YouSiP (Silicon-Platform) solution, which can be widely adopted in 5G, AI, high performance computing, cloud and edge computing, network, IoT, industrial Internet and consumer electronics, etc. YouSiP solution provides a prototype design reference for system house and fabless to speed up the time-to-market.

Founded in 2008, Brite Semiconductor is headquartered in Shanghai, China with 5 design and R&D centers as well as 4 sales offices in China and the United States.

For more information, please visit www.britesemi.com

 Back

Partner with us

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2024 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.