www.design-reuse-embedded.com
Find Top SoC Solutions
for AI, Automotive, IoT, Security, Audio & Video...

Digital Blocks AMBA Peripherals I3C, I2C, eSPI, xSPI Controller IP Core Families Extend Leadership with enhancements containing feature-rich, system-level integration features.

Jan. 09, 2023 – 

GLEN ROCK, New Jersey, January 8, 2023 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers, announces updates to I3C, I2C, eSPI, xSPI Controller Verilog IP Core family offerings.

Digital Blocks Controller IP Core family members contain feature-rich, system-level integration features. Summary information is as follows:

IP Core family Brief Description of Configurations & Capabilities
I3C I3C Master/Slave, I3C Master, & I3C Slave. Versions supporting I3C Basic specification available. I3C Slave versions either autonomous for register interface or AMBA interface to ARM or RISC-V processor.
I2C Similar configurations as with I3C above. Advanced I2C capabilities include Hs-Mode, SCLK clock only (for low power), bridging to AMBA Master bus, and SMBUS.
xSPI Similar configurations as with I3C & I2C above.
eSPI Conforms to the eSPI specification

Price and Availability

The Digital Blocks I3C, I2C, eSPI, xSPI Controller IP Core family members are available in synthesizable Verilog, along with a comprehensive simulation test suite, datasheet, and user manual. Full press release here: DB-I3C-I2C-eSPI-xSPI-Controller-Announcement.pdf For further information, product evaluation, or pricing, please go to Digital Blocks at www.digitalblocks.com



Digital Blocks IP Cores

About Digital Blocks

Digital Blocks is a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers requiring best-in-class IP for AMBA Peripherals (DMA/I3C/I2C/SPI/eSPI Controllers), TFT LCD/OLED Display Controllers & Processors, 2D Graphics Hardware Accelerator Engines, Video Signal & Image Processing, and Low-Latency UDP/RTP Hardware Protocol Stacks.

Digital Blocks designs silicon-proven IP cores for technology systems companies, reducing customer’s development costs and significantly improving their time-to-volume goals. Digital Blocks is located at 587 Rock Rd, Glen Rock, NJ 07452 (USA).

 Back

Partner with us

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2024 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.