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TSMC upends 3-nm roadmap with three new nodes
TSMC's 3-nm fabrication nodes mark the final generation of FinFET-based manufacturing processes as the foundry's 2-nm process nodes will incorporate nanosheets, also known as gate-all-around (GAA) transistors. The mega-fab's recent 2023 North America Technology Symposium provided ample information on the latest for 3-nm chip manufacturing process nodes.
www.edn.com/, May. 02, 2023 –
The information about the baseline 3-nm node, N3, which is currently in production, and details about an enhanced version, N3E, to be launched in the second half of 2023, was made available last year. The N3 node features up to 25 extreme ultraviolet (EUV) layers while using double-patterning on some of them to facilitate higher logic and SRAM transistor density than TSMC's N5 fabrication node.
On the other hand, N3E utilizes up to 19 EUV layers while not relying on EUV double patterning, which reduces fabrication complexity and costs. However, while N3E offers a wider process window and better yields, it provides lower logic density than N3. As a result, it's less attractive for chip designs aiming for density and area gains.
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