Cryo-IP for quantum computing

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The CryoCMOS Consortium has created PDK-quality, transistor models characterised for both 4K & 77K operation.

www.electronicsweekly.com/, May. 10, 2023 – 

SureCore is using these to develop IP to enable the design of cryo-control ASICs for use in quantum computing.

The challenge is the effective control of qubits which will operate at cryogenic temperatures, typically around 4K, in the confines of a cryostat.

The control electronics needed to manipulate the qubits is often located outside the cryostat and can currently only function near to room temperature.

This is because silicon ICs are only specified to operate from -40°C to 125°C (233K to 398K).

Connecting the two requires expensive and bulky cabling, and the amount of cabling required for all the qubits presents a fundamental barrier to quantum computing scaling aside from the inherent latency impact.

To achieve the necessary increase in the number of qubits, the control electronics must be co-located with the qubits in the cryostat.

However, given the restricted temperature range of current silicon ICs, this is currently not an option.

The aim of this project is to understand and model changes in transistor behaviour at cryo temperatures, produce a suite of recharacterized transistor models and then use these to design a portfolio of CryoCMOS IP to facilitate the development of custom chips that can directly interface to the qubits inside the cryostat at cryogenic temperatures.

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