Second contest for Generative AI chip design

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Efabless has launched the second in a series of AI Generated Open-Source Silicon Design Challenges aimed at people who have never designed a chip before.

www.eenewseurope.com/, Jul. 11, 2023 – 

In the first challenge, several participants successfully submitted completed designs in just three weeks using Generative AI tools such as GPT to speed up the chip design process. These included a RISC=V processor core and state machine co-processor.

The second generative AI chip design challenge will extend the design time to two months to enable wider participation with a broad range of participants including IC designers, university students, professors, industry experts, and even those who have never designed a chip.

Large Language Model (LLM) AI is widely acknowledged as being an important productivity tool, with questions raised about its limitations. The Efabless AI Generated Open-Source Silicon Design Challenge series engages a global community in LLM AI chip creation to demonstrate the state of the art over time. The use of open source and an open forum enables and encourages broad based sharing of solutions and experiences across the community, accelerating its development and adoption.

As with the first challenge in the series, contestants will use AI tools to generate Verilog code from natural language prompts, which they will then implement on the Efabless chipIgnite platform using the OpenLane open-source design flow.

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