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TSMC looks to standardise chiplet protocols in "world changing" move
By Nick Flaherty, eeNews Europe (October 9, 2023)
TSMC is looking to develop a standard data format for chiplet designs that would be used by all the EDA design tool and assembly and test providers.
This is part of a move to the 3D Blox technology for building chiplet designs on the TSMC CoWoS process. The aim is to provide common data for chiplets from different silicon suppliers, substrate and PCB makers and the OSAT assembly and test companies.
TSMC IP Cores
“Today most of the chips except for the memories come from TSMC but the goal is to mix and match but that is still some way to go but we are trying to get there,” said Dan Kochpatcharin, head of Design Infrastructure at TSMC.
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