MIPS recruits former senior SiFive execs to boost RISC-V play

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MIPS Inc. (San Jose, Calif.) has recruited Drew Barbier and Brad Burgess to its leadership team, both formerly with RISC-V pioneer SiFive Inc.

www.eenewsanalog.com/, Jan. 04, 2024 – 

Barbier joins MIPS as vice president of products and Burgess as chief architect. The appointments follow that of Sameer Wasson, who joined the company as CEO in September 2023 (see MIPS to drive RISC-V market penetration and innovation). MIPS was itself a pioneer of RISC architecture processors and is undergoing a transition to licensing its own core implementations of the RISC-V architecture.

Burgess served as SiFive's chief CPU architect and has more than three decades of semiconductor industry experience. Over time Burgess has delivered processors compliant with most of the major instruction set architectures, MIPS said These include x86, 68k, PowerPC, Arm and RISC-V.

Barbier served for more than six years at SiFive as the senior director of product management. Prior to SiFive, Barbier held technical and product management roles for companies including Faraday Technology, Arm and Analog Devices.

"Given Drew's and Brad's proven track records in the semiconductor IP space with a recent focus on RISC-V, I am confident in their abilities to help drive IP innovation and penetration into new markets," said Wasson, in a statement.

In addition to growing its executive team, MIPS is expanding with new offices in both Dallas and Austin, TX while continuing to grow in the company's existing locations in San Jose, CA and Bangalore, India.

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