sureCore PowerMiser IP enables KU Leuven chip for AI applications to achieve dynamic power saving of greater than 40%

Feb. 25, 2025 – 

Sheffield, UK - 25 February 2025 -- SureCore, the ultra-low power memory specialist, has enabled KU Leuven, Belgium’s renowned research university, to develop a neural processing accelerator chip for AI applications that boasts dynamic power savings in excess of 40%, compared to solutions using the industry standard SRAM. Already demonstrated in more mature nodes, the 16nm FinFET variant of sureCore’s PowerMiser™ IP incorporates the company’s market-leading power saving technologies to deliver world-class results.

Paul Wells, CEO at sureCore, says: “We are delighted to hear that the team at KU Leuven has achieved significant improvements with our ground-breaking PowerMiser SRAM IP, which we created to deliver unparalleled dynamic and static power performance.”

PowerMiser is a low-power SRAM IP that has been developed for leading-edge devices demanding high computational loads when active as well as minimal operating and stand-by power consumption. It can reduce dynamic power by up to 50% and static/leakage power by up to 20% compared to foundry and other SRAM solutions, with savings across the full process, voltage and temperature range.

Wells continues: “People forget that the initial drivers for the 16nm node were mobile and HPC solutions, and hence most of the IP developed for this node was optimised for performance not power. Today 16nm could almost be considered to be a mature node with many millions of devices in the field. Forward-thinking application developers are now looking to exploit this node’s improved density, leakage and power characteristics, especially for wearables, medical and Edge-AI devices. This is where our PowerMiser SRAM can bring huge benefits by enabling challenging power budgets to be delivered.”

Professor Wim Dehaene at KU Leuven (Katholieke Universiteit Leuven) comments: “We licensed sureCore’s PowerMiser IP because we wanted to create a novel neural processing accelerator chip for AI applications. The chip has very high computational processing needs, and, of course, such devices naturally also have significant power consumption characteristics. We were very impressed that the sureCore solution could go so far in terms of power savings.”

PowerMiser is available in 28nm, 22nm and 16nm process nodes, and later this year sureCore plan to release a 7nm variant.

About this KU Leuven project

Professor Wim Dehaene is working in the MICAS research division of KU Leuven’s electrical engineering department. The research of the six professors is focused on integrated circuit design, both analogue and digital. For more information, visit: www.micas.be

Wim Dehaene’s personal research interest is on low power digital circuits and memory, in memory compute as well as on biomedical circuits.

About sureCore

sureCore is the ultra-low power memory specialist that empowers the IC design community to meet aggressive power budgets through a portfolio of innovative products and design services. sureCore’s low power engineering methodologies and design flows help organisations to meet the most exacting memory requirements with customised low power SRAM IP and low power mixed-signal design services that create clear marketing differentiation. The company’s ultra-low power product line encompasses a range of down to near-threshold silicon proven, process-independent SRAM IP. For more information, visit: www.sure-core.com

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