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RISC-V Turns 15 With Fast Global Adoption
May. 26, 2025, May. 26, 2025 –
Open architecture reshaping the global semiconductor landscape
By Pablo Valerio, EETimes (May 22, 2025)
In 2010, a modest summer project at UC Berkeley sought a suitable instruction set architecture (ISA). Now, 15 years later, RISC-V is a global alternative to commercial chip architectures.
The team, led by Professor Krste Asanović and graduate students Andrew Waterman and Yunsup Lee, with pivotal support from Professor David Patterson, felt existing ISAs suffered from “baggage” and that “Moore’s Law was slowing and Dennard Scaling was ending, requiring specialization, customization, and parallelism.”
They needed a “clean slate” approach. On May 18, 2010, they decided to create their own ISA, marking RISC-V’s official “birthday” as the fifth major RISC ISA from the university.
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