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Ultra Low Power Oscillator Design Considerations (<70nW)
When designing circuits and systems for battery powered devices it is imperative to consider the power consumption as a key design parameter to be minimized. There are actions to be taken on System, Circuit and Device level to minimize the consumption of the chip.
Jun. 30, 2021 –
Before going into the specific characteristics of the oscillator…
It is important to discuss the process that was used to design it: the FD-SOI process. This acronym stands for Fully Depleted Silicon On Insulator and it finds use in applications that require high digital performance along with low power analog circuits. In this process, there is a buried layer of oxide that insulates the transistor from the substrate, reducing leakage and parasitic capacitances. The thickness of the transistor channel above the oxide layer is small enough so that the channel does not require doping, thus is fully depleted. This technology has some exploitable advantages, such as low current leakages and the flexibility of controlling the device threshold by changing the voltage at the substrate, without the issue of any diode entering in conduction...
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