Cadence Debuts Its First System Chiplet Silicon To Accelerate Physical AI Development

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Nov. 20, 2025 – 

By Marco Chiappetta, Forbes

Cadence Design Systems made a major advancement with it system chiplet, that may further accelerate the semiconductor industry’s migration toward evolving chiplet-based architectures. The company detailed the successful silicon bring-up of its system chiplet architecture, which is the cornerstone of a broader chiplet ecosystem vision designed to push modular silicon platforms forward.

I first wrote about Cadence’s system chiplet earlier this year. If you missed that piece, Cadence’s system chiplet is essentially a single device that includes all of the necessary plumbing and functionality to manage the resources of a multi-chiplet System-on-a-Chip (SoC). The chiplet Cadence designed is outfitted with a system processor, safety management processor, various controllers, a Network on Chip (or NoC) and Cadence PHY IP for LPDDR5 memory, all interconnected through UCIe, or Universal Chiplet Interconnect Express.

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