D&R News Alert
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January 18th, 2024
In this issue
• Leveraging the RISC-V efficient trace (E-Trace) standard
• YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in Barcelona
• BrainChip and MYWAI Partner to Deliver Next-Generation Edge AI Solutions
• EU quantum researchers set to give up IP rights in standard-setting race
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Welcome to the issue of January 18th, 2024 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Foundry News
Chiplet and Connectivity
Products
 ❖ Avispado 222 - High Bandwidth RISC-V IP Core

Dolphin Design
 Transform AlwaysON Computer Vision with Raptor
• Scalable digital Neural Processing Unit IP
• User friendly and community supported SDK
The flexibility you need to optimize Inference/Watt/mm2
 Learn more >>

Design Platform
Memory
Rambus Quantum Safe IP Solutions
• Protect data against quantum computer attacks
• Supports NIST and CNSA selected algorithms
• Root of Trust and standalone Quantum Safe Engine
• For data center, AI/ML & highly secure applications

Watch webinar >>

RISC-V
Products
 ❖ Tessent RISC-V trace and debug

Security
Products
 ❖ PQShield - Post-Quantum Cryptography Processor

Verification IP and Test suites for UCIe, CXL, PCIe, and DRAMs
Synopsys • System Solutions for HPC, Automotive, Mobile applications
• Available for simulation, emulation, and prototyping
Learn more >>

Artificial Intelligence
Products
 ❖ Innatera Spiking Neural Processor

Automotive
Green Electronics
Partner News
Business News





What they said at
IP SoC Conference 23

Addressing connectivity scalability in the AI world with Mulit-Standard IO Chiplets driving next generation interconnects
Michael Klempa, Product Marking Specialist, Alphawave Semi

Transforming Far-Edge Computer Vision with Energy-Efficient A
Vincent Huard, Chief Technology Officer, Dolphin Design

IP Core Considerations for Ensuring Functional Safety in Safety-Critical Applications
Philipp Jacobsohn, Senior Staff Applications Engineer, SmartDV Technologies

GRLIB: VHDL IP library for fault-tolerant SoC
Fabio Malatesta, Product Marketing Engineer, Frontgrade Gaisler

CAN XL - can safety go in hand with performance?
Jacek Hanke, CEO, Digital Core Design

Solve the Latest ISO 21434 Cybersecurity Challenge with an Automotive HSM
Ruud Derwig, Senior Staff Engineer for Security IP, Synopsys, Inc.

Which IP for Which Security Certification Standard,
Ludovic Merrien, Security Certification Leader, Tiempo Secure

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