D&R News Alert
www.design-reuse-embedded.com
www.design-reuse.com
www.design-reuse-china.com
April 11th, 2024
In this issue
• Autotalks and Secure-IC Collaborate to Create the Most Secure V2X Communication Chipset
• Think Silicon and Edge Impulse Democratize ML on NEOX® for Wearables and AIoT 
• Arm Accelerates Edge AI with Latest Generation Ethos-U NPU and New IoT Reference Design Platform
$var->USER_FIRSTNAME

Welcome to the issue of April 11th, 2024 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Foundry News
Foundry Ecosystem
Arm Accelerate IP Selection with Arm IP Explorer

• Evaluate & Select Arm IP with Confidence
• Accelerate and Optimize SoC Design
• Reduce Costs and Time to Market
Learn more >>

Design Platform
Memory Solutions
RISC-V
OmniTRUST™ IP for Ultra-Low Power PVT Monitoring
OmniDesign
• ODT-PVT-ULP-001C-7 for 7nm technology
• ODT-PVT-ULP-001C-16 for 16nm technology
• Low-risk and fast time-to-market.

 See all options here >>

Automotive
Security
Products
 ❖ Tiempo TESIC CC EAL5+ Secure Element IP Core
❖ Xiphera nQrux - Hardware Trust Engines

Robust and Zero-Mask MTP Solutions for Automotive
  • NeoEE (EEPROM Type):
    Up to 500K program/erase cycles with low densities (< 16K bits)
  • NeoMTP (Flash Type):
    Up to 1K program/erase cycles with medium densities (16K-512K bits)
    • eMemory
  • AEC-Q100 Grade 0 Compliant
  • ISO26262 ASIL D Certification

Artificial Intelligence
Products
 ❖ Think Silicon NEOX GA100 - RISC-V GPGPU for 3D graphics and AI at the edge
❖ Arm Ethos-U85

Axiomise Why does formal verification matter for semiconductors?
Watch the Video >>

Green Electronics
Products
 ❖ Did you miss "Eco-ES: Eco-design and circular economy of Electronic Systems" - DATE 2024 Workshop - Valencia, Spain

Partner News
Business News






What they said at
IP SoC Conference 23

Chip Condition Monitoring and Performance Optimization. Process/Voltage/Temperature Detectors in ASIC Design Methodology.
Vsevolod Sergeenko, RFID Team Leader, NTLab

The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Dan Alexandrescu, R&D Engineer, Synopsys, Inc.

Important Considerations for Verification of CXL Devices
Nicolas Dai, Application Engineer Architect, Cadence Design Systems, Inc.

Interview with Wei-Lii Tan - Principal Product Manager for Solido Intelligent Custom IC Verification - Siemens Digital Industries Software

Hybrid Cloud Management for IP Development
Sundar M,Pitchumani Guruswamy, Director, Tessolve Semiconductor Private Limited

Eric Lalardie - Director - Arm Ltd.

Dr. Calliope-Louisa Sotiropoulou - Sales Engineer - CAST, Inc.

Michael Klempa - Product Marking Specialist - Alphawave Semi

Philipp Jacobsohn - Senior Staff Applications Engineer - SmartDV Technologies

Fabio Malatesta - Product Marketing Engineer - Frontgrade Gaisler

REGISTER:
If this newsletter was forwarded to you by a colleague, you can have it sent directly to you at no cost. To register for D&R SoC News Alert, go to: https://www.design-reuse.com/users/signup.php

UPDATE YOUR PROFILE / UNSUBSCRIBE :
You are subscribed as $var->USER_MAIL and you receive this Alert in html format.

* If you wish to unsubscribe, you can do it there:
https://www.design-reuse.com/users/alert.php?u=$var->USER_ID&e=$var->USER_MAIL