D&R News Alert
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June 20th, 2024
In this issue
• Alphawave Reveals Multiprotocol I/O Chiplet Tapeout, Collabs with Arm, Samsung
• YorChip announces Low Latency 200G Chiplet for edge AI
• M31 Announces the Launch of Advanced LPDDR Memory IP to Support HPC Applications
• Popular CAN Bus Controller Core Passes Another Rigorous Plugfest by CAST
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Welcome to the issue of June 20th, 2024 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Foundry News
■ Intel 3 Represents an Intel Foundry Milestone
■ QuickLogic Joins Intel Foundry Accelerator IP and USMAG Alliance Programs
Chiplet, D2D
■ YorChip announces Low Latency 200G Chiplet for edge AI
■ Alphawave Reveals Multiprotocol I/O Chiplet Tapeout, Collabs with Arm, Samsung
■ System-level UCIe IP for early architecture analysis of 3D Chiplet Design and Packaging
■ Primemas Selects Achronix Embedded FPGA Technology for System-On-Chip (SoC) Hub Chiplet Platform
■ GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package by Synopsys
Verification IP and Test suites for UCIe, CXL, PCIe, and DRAMs
Synopsys • System Solutions for HPC, Automotive, Mobile applications
• Available for simulation, emulation, and prototyping
Learn more >>

Design Platform
■ What is ASIC used for? By Maven Silicon
■ Creating SoC Designs Better and Faster With Integration Automation by Arteris
Design IP
■ Movellus Introduces Aeonic Power™ Product Family for On-Die Voltage Regulation
Products
 ❖ Singmai Histogram Equalisation for SD and HD video

Memory Interface
■ M31 Announces the Launch of Advanced LPDDR Memory IP to Support HPC Applications
■ OPENEDGES to Premiere PHY Vision 2.0 at Design Automation Conference 2024
Interface IP
■ Setting the Pace with PCIe® Gen 7: Alphawave Semi's Success at PCIe® Devcon 2024
■ Alphawave Semi Unlocks 1.2 TBps Connectivity for High-Performance Compute and AI Infrastructure with 9.2 Gbps HBM3E Subsystem
Frontgrade Gaisler

NOEL-V: RISC-V Processor
• High performance or area efficient implementations
• Multi-core support (SMP and AMP)
• Optional fault tolerance features
• Designed and maintained in Europe
Learn more >>
Join us at our booth at the RISC-V Summit Europe
(Munich, 24-28 June)!

RISC-V
■ Breker Verification Systems Readies RISC-V CoreAssurance and SoCReady SystemVIP for Automated, Certification-level RISC-V Verification Coverage
■ RISC-V in Space Workshop in Gothenburg on April 2-3, 2025!
Rambus Security Webinar Series
Rambus
Join us for The Ultimate Guide to Secure Silicon, a weekly webinar series on cutting-edge hardware security techniques!
When: Starting July 11th, every Thursday
Register Today >>

Security
■ Global partnership unveils quantum-safe hardware root-of-trust for cellular IoT
Automotive
■ Dream Chip and Cadence Demo Automotive SoC Featuring Tensilica AI IP at embedded world 2024
■ New Developments in MIPI's High-Speed Automotive Sensor Connectivity Framework
■ Popular CAN Bus Controller Core Passes Another Rigorous Plugfest by CAST
T2M has the most extensive MIPI Phy & MIPI
Controller IP Cores in the industry.
• Latest MIPI Phy Cores: D-PHY, C-PHY, M-PHY
• Integrated Controllers CSI, DSI, VESA DSC, UFS, UniPro
• Silicon Proven in 16 different nodes
• Silicon Proven in 9 different foundries

Artificial Intelligence
■ Why do defects occur in battery production? Explainable AI supports process optimization.
Green Electronics
■ Energy transition, electrification, and electrolysis — research for greater environmental and climate action
Partner News
■ Faraday to Exhibit Next-gen ASIC Solutions at DAC 2024
■ Japan to send 200 engineers to U.S. for AI chip training at Tenstorrent
■ PQShield raises $37m in Series B funding to deliver the widespread commercial adoption of quantum resistant cryptography
Business News
■ lowRISC and Microsoft Collaborate to Help Bring the Revolutionary CHERIoT-Ibex Core to Production Grade
■ EU proposes budget cuts to tech programmes in 2025
■ Rapidus Set to Open 2-nm Pilot Fab, CEO Says
■ Sequans Announces a New $15 Million Licensing Agreement





True Circuits
JSPICE™ Design Environment (JDE™) Available Now!
  • Quickly design, characterize, optimize and test complex circuits
  • Run millions of simulations in parallel on local or cloud servers
Sign up today >>

What they said at
IP SoC Silicon Valley 24

Interview with Geir Eide - Director, Product Management - Siemens EDA

Interview with Jayson Bethurem - VP Marketing - Flex Logix Technologies, Inc.

Interview with Ravi Thummarukudy - Mobiveil Inc.

Interview with Mahesh Tirupattur - Analog Bits Inc.

Interview with Michael Klempa - Product Marketing Specialist - Alphawave Semi

Interview with Pulin Desai - Cadence Design Systems, Inc.

Interview with Steve Roddy - CMO - Quadric

Interview with Adiel Bahrouch - Director of Business Development - Rambus, Inc.

Interview with John Swanson - Senior Product Line Manager - Synopsys, Inc.

Interview with Lamyae Lahlou - Product Manager - Kudelski IoT

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