D&R News Alert
August 1st, 2024
In this issue
• Alphawave Semi Launches Industry's First 3nm UCIe IP with TSMC CoWoS Packaging
• Rambus Expands Industry-Leading Memory Interface Chip Offering to High-Performance PCs with DDR5 Client Clock Driver
• Weebit Nano and DB HiTek tape-out ReRAM module in DB HiTek's 130nm BCD process
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Welcome to the issue of August 1st, 2024 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Design Platform
■ Alphawave Semi Launches Industry's First 3nm UCIe IP with TSMC CoWoS Packaging
■ BAE Systems Partners with Siemens for Industry 4.0 Revolution
■ How to Turbo Charge Your SoC's CPU(s) by Arteris
■ Tessolve partners with SigmaSense to develop their innovative DSP-based sensing ASIC
IP-Maker UNFC (Universal NAND Flash controller)

IP-Maker • ONFI 5.0 compliant (mandatory and optional commands).
• AXI4/Avalon interface: Slave or DMA engine.
• Full access on the NAND page (main and spare area).
• Available for Intel, Xilinx-AMD, Microsemi and ASIC

Memory IP
■ Weebit Nano and DB HiTek tape-out ReRAM module in DB HiTek's 130nm BCD process
■ M31 cooperates with Tower Semiconductor to develop advanced SRAM and ROM solutions for its 65nm Power Management Platform
Memory Interface
■ Rambus Expands Industry-Leading Memory Interface Chip Offering to High-Performance PCs with DDR5 Client Clock Driver
■ DDR5 vs DDR4 DRAM – All the Advantages & Design Challenges by Rambus
Rambus Security Webinar Series
Rambus
• Join us for The Ultimate Guide to Secure Silicon
• Weekly webinar series on cutting-edge hardware security
• August 1st: Quantum Safe Cryptography
• August 8th: Certified Silicon IP
Register Today >>

Artificial Intelligence
■ FuriosaAI and GUC Partner on RNGD, the Most Efficient AI Accelerator for LLMs
■ Sondrel's SFA 100 is ideal for AI at the Edge
In the eFPGA World
■ QuickLogic Signs Distribution Agreement with Astute Electronics to Expand Global Reach
NEURON IP Advanced IC Design & Serial Interfaces
Neuron IP • Industry Leader in Purpose-Built Silicon Interfaces
• PPA Differentiated Solutions for AI & UCIe Chiplets
• Established Silicon-Proven Design Methodology
• Experienced SerDes & Memory Engineering Team

More at www.neuronip.com

Green Electronics
■ Sustainability vs. Progress: The Tightrope Walk of AI Chip Manufacturing
■ Scaling sustainability impact
Partner News
■ Weebit Nano moves closer to availability at DB HiTek; tapes out first chip
■ Faraday Reports Second Quarter 2024 Results
■ Rambus Reports Second Quarter 2024 Financial Results
Business News
■ Samsung Sees Solid Demand for 3nm in 2H24, Aiming a Ninefold Increase in AI/HPC Sales by 2028
■ Renesas Completes Acquisition of Altium






What they said at
DAC 2024 ?

Purna Mohanty
CEO
Signature IP Corporation

Annamalai Muthu
Director
CM Engineering Labs Singapore Pte. Ltd

Anupam Bakshi
Founder & CEO
Agnisys, Inc.

Dr. Reza Azarderakhsh
CEO & Founder
PQSecure Technologies

Nitin Kishore
CEO
Truechip Solutions

What they said at
IP SoC Silicon Valley 24

Interview with Jayson Bethurem - VP Marketing - Flex Logix Technologies, Inc.

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