Ausdia SoC Catalog

Ausdia s technology is made to handle large and complex SoC designs bringing a new way for system-on-chip (SoC) and integrated circuit (IC) developers to make massive productivity gains across the design flow and reduce costs.

TimeVision is a proven and automated solution to generate and validate design constraints that correlate with STA engines to ensure design correctness and consistency from RTL to GDSII.
TimeVision is based on patented algorithms, multi core technology architecture and is using innovative formal verification technology.