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SuperFlash® is SST s patented and proprietary NOR flash technology. SuperFlash® technology and memory cell have a number of distinct advantages for designing and manufacturing NOR flash devices, or for embedding SuperFlash® memory in logic process. SuperFlash® technology is fully CMOS compatible and it does not impact any logic devices. This technology has been in high volume production since 1994. SuperFlash® technology is the non-volatile memory of choice for embedded applications.


  • Fast Time to Market
    SuperFlash® technology is production proven with SST's NOR flash products before it is installed at a foundry or IDM, so it is a low risk and fast time to production for embedded applications.
  • Low Power Solution
    • Low-Power Programming:
      SuperFlash uses source side injection for programming which is very efficient (1E-03) hence lower power than other options. Typical program current per cell is only in the range of few uA.
    • Low Power for Erase Operations:
      SuperFlash uses FN tunneling for Erase which is inherently very efficient hence low power. Typical Erase current per cell is in the range of tens of pA.
    • Low Power Read Operation:
      No charge pump is needed for the Read Operation, so read power is much lower (CV2 relationship) than traditional stacked gate solutions.
  • High Reliability and No SILC
    Stress Induced Leakage Current is eliminated because the erase and program operations are decoupled in the cell, which also means parts can be screened for Endurance.
    SuperFlash® uses thick tunnel oxide and an optimized scheme for Erase operation; therefore it doesn't suffer from traditional Stress Induced Leakage Current (SILC) issues.
  • Area and Performance Tradeoffs
    SuperFlash® technology is very flexible and a solution can be optimized for either small area or high-speed read operation (125MHz).

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