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All Silicon IP

Overview

The OL_H264E-CFS core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video stream as input and outputs the encoded bitstream. Simple, fully synchronous design with low gate count.

Benefits

  • Compressed Frame Store (CFS)
  • Extreme Low Power
  • HDTV suport
  • Low gate count
  • Progressive and interlaced video support
  • Extremely low latency

Applications

  • Digital video recorders
  • Video wireless devices
  • Video surveillance systems
  • Hand held HDTV video cameras

Features

  • Fully compatible with the ITU-T H.264 specification
  • Highly (10-15:1 ) compressed frame store (CFS) with perfect reconstruction (no error/drift) with third party standard decoders. Patent pending technology
  • Extremely low power : no external DRAM required and much lower bandwidth and power through the CFS
  • I and P frame support
  • Proven in FPGA : 720p @ 30 fps in Virtex5-2 demo board with video streamed to Ethernet
  • Profile level 4.1, can be decoded by Baseline, Main or Hi Profile decoder
  • Supports up to the highest HDTV video resolution (1920x1080 @ 30 fps progressive
  • Very low operational frequency
  • Single core HDTV support in FPGA : 720p (1280x720) at 30 fps in high end device
  • No CPU required for encoding

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