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All Silicon IP

Overview

The Physical Unclonable Function (PUF) is a fully integrated analog IP generating a stable number from random local process variations.

Tech Specs

Market SegmentInternet of Things
Geometry nm65, 55
Maturity Silicon Proven

Technical Claims

typical characteristics of a 55 nm CMOS implementation:
  • power supply voltage range: 1.2 V ±10%
  • operating junction temperature range: -40°C to 125°C
  • typical bit reading time shorter than 10 µs
  • typical operating current during bit reading smaller than 20 µA
  • typical standby current smaller than 1 µA
  • silicon area smaller than 0.04 mm2

Features

  • Fully integrated
  • Margin-check mechanism
  • Robust architecture
  • Low power consumption
  • Silicon proven
  • stable 128-bit number generated from random local process variations
  • fully integrated analog IP based on a current-mode architecture
  • 128 reliable bits selected among a total of 256 bits (size customized on request)
  • bit stability verified through a margin check mechanism
  • reliable bits stable over voltage, temperature and aging
  • typical retention time under normal operating conditions higher than 10 years
  • silicon proven in 65 nm and 55 nm CMOS processes

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