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IP SoC 2016 Program
DAY 0: Monday December 5, 2016
Why Join D&R User Group Meeting ? Click here | |
17:00 | What services offers D&R websites : What's new in 2017 |
17:30 |
D&R 20th anniversary offerings for a connected IP SoC world !!!
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18:30 | Welcome drinks !!! Open the 20th anniversary of Design and Reuse |
DAY 1: Tuesday December 6, 2016
08:00 - 09:00 | Registration |
09:00 - 09:20 | Welcome : From IP to IoT a success track ? By Gabriele Saucier CEO Design And Reuse France |
09:20 - 09:40 | Your fortune behind the Great Wall - China IP SOC opportunity update 2016 By Mark Ma Shanghai Jiatao Corp Ltd China |
09:40 - 10:00 | Break |
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Session : Breaking News from
Foundries Chairman: Gabriele Saucier, Design And Reuse |
10:00 - 10:20 | Designing with TSMC Open Innovation Platform (OIP) Ecosystem By Banchuan Cheong Technical Manager TSMC Europe |
10:20 - 10:40 | FDSOI production readiness and its roadmap beyond 22FDX By Gerd Teepe GlobalFoundries Germany |
10:40 - 11:00 | Innovative FSOI IP needed !!! By Patrick Blouet Collaborative program manager STMicroelectronics France |
11:00 - 11:20 | L-IoT : a flexible and ultra low power IoT platform in FDSOI 28 nm By Ivan MIRO PANADES CEA Leti France |
11:30 - 12:30 | Lunch |
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Session : From IP to IoT : Where is the IP world going? Chairman: Philippe Quinio, STMicroelectronics, France |
12:30 - 12:50 | IP Explosion (1995-2010) and IP Paradox (2010-2025) By Eric Esteve IP Nest France |
12:50 - 13:10 | Back to the Future. The end of IoT By Bill Finch CAST USA |
13:10 - 13:30 | How to jump start your ARM-based IoT chip for free By Phil Burr ARM UK |
13:30 - 13:50 | Configurable Microprocessor for Life Essential Devices By Thang Tran Synopsys Inc. USA |
13:50 - 14:10 | Break |
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Session: Security a key challenge
Chairman: Gregory Baudet, Barco-Silex, Belgium |
14:10 - 14:30 |
Right sizing the SoC security architecture for the new connected world By Jerome Allard Inside Secure France |
14:30 - 14:50 |
ARM technologies for IoT system's security, from device to cloud By Mike Eftimakis ARM UK |
14:50 - 15:10 | Setting up secure VPN connections with cryptography offloaded to your Altera SoC FPGA By Pieter Willems Barco Silex Belgium |
15:10 - 15:30 | Challenges and Solutions for Securing your Embedded System By Charles Thooris Director Secure-IC Pte Ltd, Head of Sales Singapore |
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Session: IP in SoC and Product in a connected world Chairman: Mike Eftimakis, ARM |
15:30 - 15:50 |
IP Breadcrumbs Method for tracking IP versions in SOC Database By Mukund Pai Intel Corp USA |
15:50 - 16:10 | A Knowledge Sharing Framework for Fabs, SoC Design Houses and IP Vendors By Anne Meixner The Engineers' Daughter LLC USA |
16:10 - 16:30 | Algodone: Hardware features runtime licensing and Monetization By Jerome RAMPON Algodone |
16:30 - 16:50 | How to keep IP vendor and iP consumer in pace: Standardized IP Fee & Royalty Engine By Gabriele Saucier CEO Design And Reuse France |
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Panel |
17:00 - 18:30 | Panel: Globalization - The challenge of the worldwide IP business from Infrastructure to Legal and Finance
Moderator: Bill Finch (CAST) |
19:30 - 21:30 | French Touch Buffet Open the 20th anniversary of Design and Reuse |
DAY 2: Wednesday December 7, 2016
08:00 - 09:00 | Registration |
09:00 - 09:40 | Session: Specific FDSOI Design Technique Chairman: Gerd Teepe, GlobalFoundries |
Modelling of Body-Biasing on Zero-Temperature-Coefficient of 28nm Fully Depleted Silicon-On Insulator (FDSOI) Based on Spatial Interpolated Lookup Tables By Abdelgader M. Abdalla |
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Design of a low noise low frequency amplifier in FDSOI By Wieslaw Kuzmicz Warsaw University of Technology |
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Electronic Circuit Design for RF Energy Harvesting using 28nm FD-SOI Technology By AWAD Mohamad Grenoble INP |
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Efficient PMIC Design for Energy Harvesting Applications By Zahit Evren Kaya TUBITAK BILGEM Turkey |
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Ultra low power LNA-LDO design in 28nm FDSOI technology for Radio Frequency Power Gating By Abdelkader Taibi IMEP-LAHC |
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Session Low Power
challenge Chairman: Aurelie Descombes, Dolphin Integration |
09:40 - 10:00 | Unified Methodology for effective correlation of SoC Power Estimation and Signoff By Pankaj Singh, Girish Ravandur Chikkaveerappa, Edwin Darmawan Marelie, Lalit Gohate Infineon Technologies India |
10:00 - 10:20 | Activity Control Unit design By G. Reveret Dolphin integration France |
10:20 - 10:40 | Break |
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Session: From Physical to Standard cell
and Analog design Chairman: Pankaj Singh, Infinion Technologies |
10:40 - 11:00 | Low voltage standard cells libraries By Bastien Arricca Dolphin Integration France |
11:00 - 11:20 | Solving Design Productivity Challenge in Analog Design By Ramy ISKANDER CEO Intento Design France |
11:20 - 11:40 | VIA PUF: Ultimately Stable PUF Design using Random Via Formation in Standard CMOS Technology By Jein Yu ICTK South Korea |
11:40 - 12:00 | A Flexible 200kHz-20MHz Ring Oscillator in a 40nm CMOS Technology By Murilo Pessatti Chipus Microelectronics Brazil |
12:00 - 13:00 | Lunch |
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Session: Innovative IP and
SoC Chairman: Thang Tran, Synopsys |
13:00 - 13:20 | Improving the Efficiency of Memory Sub-Systems By Gregory Recupero Founder & CTO Performance-IP LLC USA |
13:20 - 13:40 | A 4-MHz parameterized Logarithm-Square Root IP-Core By Elton Costa UFCG Brazil |
13:40 - 14:00 | Hybrid hardware architecture for low complexity motion estimation algorithm By Anil Celebi Kocaeli University Turkey |
14:00 - 14:20 | A System-on-Chip Design based in RISC-V Architecture By Elton Costa UFCG Brazil |
14:20 - 14:50 | Break | |
Session: Design and verification methodology Chairman: Huy - Nam Nguyen, ATOS |
14:50 - 15:10 | A Cost-Effective Re-use Method of Off-the-Shelf MIMO Wireless LAN IPs with a Nested Spatial Mapping By Ealwan Lee GCT Semiconductor, Inc. USA |
15:10 - 15:30 | Reusable Verification Model for Motion estimation Algorithm By Anil Celebi Kocaeli University Turkey |
15:30 - 15:50 | Rapid Physical Prototyping of Microelectronic Systems Based on Incompatible Technologies By Frederick Kalinian Innotime Technologies Canada |
15:50 - 16:10 | Applying Continuous Integration to Hardware Design and Verification By Francois Cerisier AEDVICES Consulting France |
16:10 - 16:30 | Prize and Lucky Draw |