www.design-reuse-embedded.com
Search Solutions  
OK
66 "Image" Solutions

1
CDNN Deep Learning Compiler
The CEVA Deep Neural Network (CDNN) is a comprehensive compiler technology that creates fully-optimized runtime software for CEVA-XM Vision DSPs and NeuPro AI processors. Targeted for mass-market embedded devices, CDNN incorporates a broad range of network optimizations, advanced quantization algorithms, data flow management and fully-optimized compute CNN and RNN libraries into a holistic solution that enables cloud-trained AI models to be deployed on edge devices for inference processing.

2
CEVA-SLAM SDK and Vision Software Libraries
The Application Developer Kit (ADK) for CEVA-XM and NeuPro streamlines the software development and integration effort required for advanced vision and AI applications. It enables entire applications to be run in a more familiar CPU environment, while automatically translating and optimizing code on the more power-efficient DSP.

3
CEVA-XM4 Imaging & Vision DSP
The CEVA-XM4 imaging and computer vision processor IP solves the most critical issues for the development of energy-efficient embedded vision systems where die size and power budget are extremely constrained, yet algorithms require intensive processing.

4
CEVA-XM6 Vision & Deep Learning DSP
The CEVA-XM6 is a fifth-generation imaging and computer vision processor IP from CEVA, and is designed to bring deep learning and artificial intelligence capabilities to low-power embedded systems, targeting mass-market intelligent vision applications.

5
Mali-G72 High Performance GPU
Arm® Mali™-G72 is the second generation Bifrost-based GPU for High Performance products.

6
MIPI CSI-2 Receiver IP
The Arasan MIPI CSI-2 Receiver IP provides a standard, scalable, low-power, and high-speed interface that supports a wide range of high image resolutions.

7
5Mpixel ISP IP - 5M pixel sensor support Image Signal Processing (ISP) IP
Chips&Media s Camera ISP IP – LEDA is the Imaging Signal Processing (ISP) targeted to be used in low light environment

8
Lossless & Near-Lossless JPEG-LS Encoder
The JPEG-LS-E core implements a highly-efficient, low-power, lossless and near-lossless image compression engine that is compliant to the JPEG-LS, ISO/IEC 14495-1 standard.

9
Multi (2) Exposures HDR - Multi (2) Exposures High Dynamic Range (HDR) IP
NIX is multi-exposure high dynamic range IP, commonly known as HDR, which is based on 2 exposures blending (long and short exposures).

10
PowerVR G6630 GPU graphics processor
The PowerVR Series6 family delivers a significant portfolio of new technologies and features, including: an advanced scalable compute cluster architecture; high efficiency compression technology inclu...

11
PowerVR Series8XE GPU Family
The PowerVR Series8XE family of GPUs drives cost reduction in entry-level and mass market devices by offering 2 pixels/clock and 4 pixels/clock versions optimized to deliver the best user experience in a limited silicon area budget. This GPU family enables low-cost devices to benefit from the latest apps by supporting the most advanced APIs from Khronos, including OpenGL ES 3.2 and Vulkan 1.0.

12
PowerVR Series8XT Core
The PowerVR GT8525 is the first PowerVR 8XT core to be launched. It is based on the new Furian architecture, and brings about the advantages of that leading architecture

13
PowerVR Series9XE GPU Family
PowerVR Series9XE GPUs are a new generation of PowerVR GPUs based on the PowerVR Rogue architecture, that raise the bar on graphics and compute in cost-sensitive devices, letting SoC vendors achieve a...

14
PowerVR Series9XM GPU Family
PowerVR Series9XM GPUs are a new generation of PowerVR GPUs based on the PowerVR Rogue architecture, that raise the bar on graphics and compute in cost-sensitive devices, letting SoC vendors achieve a...

15
Window Motion Adaptive (MA) based 3DNR - Window MA based 3D Noise Reduction IP
HYDRA is temporal noise reduction IP, commonly known as 3DNR, which is based on Windows MA (motion adaptive) providing small IP size.

16
H.266/VVC Compliance Test Suite for Video Decoder Validation
Allegro DVT compliance bitstreams are designed for intensive testing of H.266/VVC 1 decoder implementations.

17
JPEG XS - the new low complexity codec standard for professional video production
JPEG XS stands for extra speed and extra small. The new ISO mezzanine codec standard co-developed by the Fraunhofer Institute for Integrated Circuits enables interoperability and allows an easy and cost effective integration into IP based infrastructure.

18
2D graphics- BADGE- BitSim Accelerated Display Graphics Engine
A configurable block with an advanced 2D graphics controller for both ASIC and FPGA that offloads your processor system.

19
Camera Multiple Receiver 2.5Gbps 8-Lane
The Camera Multiple (Combo) Receiver 2.5Gbps 8-Lane is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processer) and DSP.

20
NEMA | dc
NEMA|dc is not just an ordinary display controller, it is a real Swiss Army Knife which contains several smart tools and functions to compose multiple graphics and video layers by improving image quality and help to reduce the SoC power consumption.

21
NEMA | t
The smallest Internet-of-Things (IoT) Graphics Processor Unit (GPU) with 3D functionality. The architecture of NEMA|t has been specifically designed from bottom-up for the new generation of superior wearable and IoT display products which require great graphics quality and performance and ultra-low power consumption.

22
TICO XS
intoPIX has made significant intellectual property development in lightweight low latency video compression, from inventing and standardizing the world's smallest and fastest mezzanine compression technology TICO (SMPTE RDD35) supported by the TICO Alliance, to being the proponent and co-developer of creating the world first international ISO standard technology JPEG XS , addressing this matter.

23
Ultra High Definition 4K & 8K JPEG 2000 Encoders & Decoders IP-cores
JPEG 2000 for extreme resolutions and UltraHDTV

24
VESA DSC 1.1 Video Decoder IP Core
VESA DSC 1.1 compliant Video Decoder IP Core.

25
VESA DSC 1.1 Video Encoder IP Core
VESA DSC 1.1 compliant Video Encoder IP Core.

26
VESA DSC 1.2a Video Decoder IP Core
VESA DSC 1.2a compliant Video Decoder IP Core

27
VESA DSC 1.2a Video Encoder IP Core
VESA DSC 1.2a compliant Video Encoder IP Core

28
2D/3D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
D/AVE HD is a cost-efficient IP core family for 2D and 3D graphics applications. The variants of the core are available for FPGAs, ASICs and SOCs, specifically designed for the embedded, automotive an...

29
3D OpenGL ES 1.1 GPU (Graphics Processing Unit)
D/AVE 3D is cost-efficient IP core for 3D graphics applications. This core is available for FPGAs, ASICs and SOCs, specifically designed for the embedded, automotive and infotainment market with a big...

30
Color Enhancement (CLREN) IP
BTREE's Color Enhancement IP modifies or emphasizes color by controlling Saturation/Luminance/Hue. BTREE's Color Enhancement can only adjust the color & brightness of the specific area that us...

31
Color Gamut
Color Gamut controls the color of the output image/video compared to the input image/video for high color reproduction on the display.

32
Customizable Display Controller with composition support
CDC is a fully Customizable Display Controller IP core family supporting the OpenWF display API specification. Several features can be configured at synthesis time and controlled at run time via a reg...

33
High Dynamic Range (HDR)
HDR improves the visibility of the output image compared to the input images by increasing the contrast of the image/video reproduced on the display.

34
High-Performance Imaging System Development
High-performance data capture and Imaging Systems for harsh environments demanded by space, defense, homeland security, medicine and other applications.

35
IPB-PNG-E 24-bit 20-fps Portable Network Graphics Encoder
The IPB-PNG-E core can be used in systems on chip for encoding picture streams using the Portable Network Graphics (PNG) format. It has been designed for systems requiring high frame rate while encoding RGB images at 24-bit color depth.

36
JPEG Codec Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4 conform to the JPEG baseline format for compressing/decompressing still images.

37
JPEG Decoder Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4DEC conform to the JPEG baseline format for decompressing still images.

38
JPEG Encoder Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4ENC conform to the JPEG baseline format for compressingstill images.

39
JVC 2D3D Conversion Soft IP for Android - Convert 2D Image into 3D stereoscopic image in real-time
JVC 2D3D Conversion Soft IP for Android mobile and tablet.

40
JVC 3D Frame Rate Converter IP - 3D-FRC convert 50/60fps video to blur-less and judder-less 100/120fps
JVC s 3D-FRC IP is now available for licensing. It offers frame rate conversion and 3D decoding with high performance.

 | 
 Previous Page
 | 1 | 2 | 
Next Page 
 | 
 Back

Partner with us

 

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2020 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.