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64 "RISC-V Processors" Solutions

1
32-bit Embedded RISC-V Functional Safety Processor
The EMSA5-FS is a processor core designed for functional safety. The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing th...

2
E20 Smallest, most efficient RISC V Ccore
The SiFive E20 Standard Core is an extremely efficient implementation of the E2 Series configured for very low area and power. The E20 brings the power of the RISC-V software ecosystem to efficiently ...

3
E21 High-performance, full-featured Embedded processor
The SiFive E21 Standard Core is a high-performance, full-featured embedded processor designed to address advanced microcontroller applications such as Sensor Fusion, Smart IoT, Wearables, Connected To...

4
E24 High-performance microcontroller with hardware support
The SiFive E24 Standard Core is a high-performance microcontroller with hardware support for single-precision floating-point capabilities by implementing the RISC-V ISA's F standard extension. Th...

5
E31 Balanced performance and efficiency RISC V core
The SiFive E31 Standard Core is the world's most deployed RISC-V core. Co-designed alongside the RISC-V ISA, the E31 takes maximum advantage of the RISC-V ISA, resulting in a power-efficient core ...

6
E34 Standard RISC V Core
The SiFive E34 Standard Core adds single-precision floating-point to the SiFive E31 Standard Core, the world's most deployed RISC-V core. The E34 enables advanced applications which require hardw...

7
E76 High performance 32-bit embedded processor
The SiFive E76 Standard Core is a high-performance 32-bit embedded processor which is fully-compliant with the RISC-V ISA. Its advanced memory subsystem enables inclusion of tightly-integrated memory ...

8
E76-MC Quad-core 32-bit embedded processor
The SiFive E76-MC Standard Core is a high-performance quad-core 32-bit embedded processor which is fully-compliant with the RISC-V ISA. Its advanced memory subsystem enables inclusion of tightly-integ...

9
High performance Linux capable vector processor
The SiFive Intelligence VIU75 Standard Core is a single-core instantiation of our RISC-V application processor with vector extensions and is capable of supporting full-featured operating systems such ...

10
S21 Area optimized 64-bit RISC V processor
The SiFive S21 Standard Core is a full-featured 64-bit embedded processor based on the S2 Series. The S21 has separate Instruction and Data Buses, along with 2 banks of Tightly Integrated Memory (TIMs...

11
S51 Low-power 64-bit MCU RISC V core
The SiFive S51 Standard Core is a 64-bit embedded processor, fully compliant with the RISC-V ISA. A small-footprint, low-power design makes the S51 ideal for devices that require a tiny system control...

12
S54 64-bit embedded RISC V processor
The SiFive S54 Standard Core is a 64-bit embedded processor that is fully-compliant with the RISC-V ISA. It adds support for the F and D standard extensions, which provide the S54 with double-precisio...

13
S76 High-performance 64-bit embedded core
The SiFive S76 Standard Core is a high-performance 64-bit embedded processor which is fully-compliant with the RISC-V ISA. The S76 is ideal for latency-sensitive applications in domains such as stora...

14
S76 MC Quad-core 64-bit embedded processor
The SiFive S76-MC Standard Core is a high-performance 64-bit quad-core embedded processor which is fully-compliant with the RISC-V ISA. The S76-MC is ideal for latency-sensitive applications in domai...

15
U54 Linux-capable RISC V application processor
The SiFive U54 Standard Core is a single-core instantiation of the world's first RISC-V application processor, capable of supporting full-featured operating systems such as Linux. The U54 is idea...

16
U54 MC Multicore: four U54 cores and one S51 core
The SiFive U54-MC Standard Core is the world's first RISC-V application processor, capable of supporting full-featured operating systems such as Linux. The U54-MC has 4x 64-bit U5 cores and 1x 64...

17
U74 High performance Linux-capable RISC V processor
The SiFive U74 Standard Core is a single-core instantiation of the world's highest performance RISC-V application processor, capable of supporting full-featured operating systems such as Linux. T...

18
U74-MC Multicore: four U74 cores and one S76 core
The SiFIve U74-MC Standard Core is the world's highest performance RISC-V application processor, capable of supporting full-featured operating systems such as Linux. The U74-MC has 4x 64-bit U74 ...

19
64-bit RISC-V application processor core with 7-stage pipeline

The A70X is a powerful 64-bit RISC-V application processor aimed at systems running Linux. The core has an in-order 7-stage pipeline enabling greater than 1 GHz frequencies in 22nm HPC.

The...


20
64-bit RISC-V application processor core with L2 cache coherence
The A70X is a powerful 64-bit RISC-V application processor aimed at systems running Linux. The core has an in-order 7-stage pipeline enabling greater than 1 GHz frequencies in 22nm HPC. The core incl...

21
Compact efficient 64-bit embedded RISC-V processor
The Bk5 is an entry level, compact, efficient 64-bit embedded RISC-V processor aimed at embedded systems requiring a large address space.

22
Compact RISC-V Processor - 32 bit, 3-stage pipeline, 16 registers

The L10 is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage pipeline and with 16 general purpose regist...


23
Compact RISC-V Processor - 32 bit, 3-stage pipeline, 32 registers

The L30(F) is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage pipeline and has 32 general-purpose regi...


24
NOEL-V Processor
The NOEL-V is a synthesizable VHDL model of a 64-bit processor that implements the RISC-V architecture. The processor is the first released model in Cobham Gaisler s RiSC-V line of processors that complement the LEON line of processors.

25
Powerful 64-bit embedded RISC-V processor
The Bk7 is a powerful 64-bit embedded RISC-V processor aimed at systems running Linux.

26
SweRV EH1 Support Package
The SweRV EH1 Support package (SSP) contains everything needed to deploy a Western Digital SweRV EH1 core in an integrated circuit

27
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including G (IMAFD) standard instructions, C 16-bit compression instructions, P Packed-SIMD/DSP instructions, N fo...

28
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the IMAFD standard instructions, "C" 16-bit compression instructi...

29
APS1V - Compact Implementation of the RISC-V RV32IMC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveraging the success of their APS family of processors. ...

30
APS3V - Compact Implementation of the RISC-V RV32IMC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveraging the success of their APS family of processors. ...

31
APS5V - Compact Implementation of the RISC-V RV32IMAC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveraging the success of their APS family of processors. ...

32
Compact High-Speed 32-bit CPU Core
AndesCore™ N25 is a 32-bit CPU IP core based on AndeStar™ V5m Instruction Set Architecture, which support RISC-V RV32IMAC extensions from the latest developments in computer architecture a...

33
Compact High-Speed 32-bit CPU Core with DSP
Compact High-Speed 32-bit CPU Core with DSP

34
Compact High-Speed 64-bit CPU Core
NX25 is a 64-bit CPU IP core for applications with memory usage greater than 4G bytes, which is the bound of 32-bit processors. NX25 let high performance computing with very little silicon footprint achievable by its AndeStar® V5m Instruction Set Architecture.

35
Compact High-Speed 64-bit CPU for Real-time and Linux Applications
AndesCore™ AX25 is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is tailored for high-performance embedded applications that needs to access address space over 4GB.

36
FPS29V - Dual Issue Implementation of the RISC-V RV32IMAFC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveraging the success of their APS family of processors. ...

37
FPS69V - Dual Issue Implementation of the RISC-V RV64GC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveraging the success of their APS family of processors. ...

38
icyflex-V Low-power 32-bit RISC-V processor
The icyflex-V 32-bit processor core is based on the RV32IMC open-instruction set architecture (ISA) defined by the RISC-V foundation and, as such, is supported by standard state-of-the-art development tools (both open-source and proprietary).

39
RV12 - RISC-V Processor
A highly configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market. The RV12 implements a Harvard architecture for simultaneous instruction and data memory accesses.

40
RV32EC_P2 Processor Core IP
IQonIC Works RV32EC_P2 Core is a 2-stage pipeline RISC-V processor core, designed to meet the needs of small, low-power embedded applications, running only trusted firmware.

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