When : September 11th, 2025
Where: Renaissance Shanghai Pudong Hotel
No.719 Yingchun Road, Lianyang District, Pudong,
Shanghai, China
Join D&R IP SoC China 25 !! A worldwide connected Event !!
Co-organized with:
A worldwide connected Event !!
D&R IP-SoC China 2025 Day is the unique worldwide event in China fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems.
IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services and share their vision about the next innovation steps in the Electronic Industry.
IP consumers can view at a glance the latest Technology trends and exciting Innovative IP/SoC products. Through a global view, Electronic systems leaders may identify disruptive innovation leading to new market segment growth.
The event is a face to face meeting. In order to enhance the market attention the talk material and videos are posted concurrently on www.design-reuse-china.com and Youku.
Any question? Please contact us
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9.00 am
Introduction
Chairperson: Bulu Xu, SSIPEX
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IP vendor the seed of innovation in the semiconductor world
Gabrièle Saucier
CEO
Design And Reuse
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Status and Trend of China's IP
Dr. Xu
SSIPEX
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Your Trusted Turnkey Partner with One-Stop IP and SoC Platform Solutions
Eunice Rao
IP Project Director
Brite Semiconductor
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Break
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10.20 am
Chiplets and Connectivity
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UCIe-S v2.0 PHY IP: Measured Si Results and Robust Design Methodology from Simulation to Silicon
We will present our UCIe test results along with an overview of our development environment and methodology. This session will highlight key findings from our UCIe PHY testing, demonstrating performance and interoperability. Additionally, we will sha re insights into our structured development workflow, verification strategies, and collaborative environment designed to deliver high-quality, reliable IP solutions.  ... 
Roger Han
Strategy & Marketing Team Leader
Qualitas Semiconductor
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eTopus IOD: The Optimal Solution for the 'Warring States Era' of Scale-up Ecosystems
Jason Liu
Solution Manager
eTopus Technology Inc.
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Highspeed Connectivity Solutions for 22nm Tech Nodes
New applications in networking, in communications like 5G/6G and mmWave or in automotive with radar/lidar require high-speed data connectivity. This incurs data rates bigger than 20 Gbps per lane. These applications typically require chips that are p roduced in mainstream tech nodes, like GF 22DFX. When many data lanes are applied and active the power consumption of SerDes-based connectivity becomes an issue and can break an intended architecture. EXTOLL�s technology provides solutions for highest speeds at lowest power consumption enabling new future-proven systems. ...
Robert Kong
Extoll GmbH
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Unlocking Computing Bottlenecks: How DRAM, SerDes, and Chiplet IP Are Reshaping the High-Performance Chip Landscape
Oliver Jia
IP&SoC Solution Architecture
Innosilicon
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Bringing Security to Chiplets for Trustworthy Systems in Package
Chiplets are a new way to design in electronics: creating an application simply requires to stitch together already existing chiplets in a so-called System-in-Package (SiP). Cadence has already taped-out a chiplet targeting automobile industry, in 3 nm TSMC process. It embedded Secure-IC IPs to secure it and allow for a secure SiP assembly. Chiplet is the next paradigm for automotive market and datacenters, which are both software defined hence require a uniform hardware. In this paper, Secure-IC explains how security is enabling secure assembly of chiplets. Besides, we announce the Protection Profile drafting effort that we have undertaken. ...
Shengnan WANG
General Manager China
Secure-IC
Online Only
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1.00 pm
Analog and Memory IP
Chairperson: Alex ZOU, Innosail
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Advancing Power Telemetry
Julian Hu
VP, China Sales
Movellus, Inc.
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SLM PVT Monitors IP Overview
Synopsys Silicon Lifecycle Management (SLM) PVT Monitor IP sets the industry standard for excellence. We provide hard IP that is complemented by dedicated PVT-Controller soft IP, enabling the creation of desirable monitoring subsystems. Our highly di fferentiated IP offers unparalleled accuracy, broader operating temperature and voltage ranges compared to the competition and provides customers with the confidence of fully silicon-verified solutions, accompanied by comprehensive silicon reports. As advanced nodes continue to evolve, the need for monitoring is expanding. Synopsys SLM PVT Monitor IP addresses the growing demand for process-related electrical and thermal condition data collection across all phases of an SoC's lifecycle—from testing to real-time mission mode operation. Staying attuned to our customers' needs, we are actively expanding our portfolio with new monitoring subsystem solutions and increasing foundry coverage. The SLM PVT Monitor IP now offers expanded foundry coverage, including Samsung, in addition to TSMC's latest processes. These features make Synopsys SLM PVT Monitor IP highly differentiated, offering a unique value proposition unmatched by competitors in delivering a comprehensive, end-to-end total solution. ...
Liqiong Yu
Application Engineer
Synopsys, Inc.
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Semiconductor IPs for Memory, Flash storage and wireless applications
Ravi Thummarukudy
CEO
Mobiveil Inc.
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Break
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2.20 pm
Memory Interface
Chairperson: Alex ZOU, Innosail
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The Widespread Use of LPDDR Memory Subsystem
Minlin Fan
China Country Manager & VP of Sales
OPENEDGES Technology, Inc.
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Unlocking Generative AI at the Edge: How LPDDR enables Scalable & Efficient Intelligence
As generative AI continues to redefine the boundaries of creativity and automation, its true value is realized when inference is optimized for real-world deployment�especially at the edge. This presentation explores how inference serves as the crit ical enabler for delivering generative AI experiences that are responsive, efficient, and scalable. We will examine how LPDDR memory technologies, with their unique balance of high bandwidth, low latency, and cost efficiency, are ideally suited for edge AI applications�from smart cameras and industrial sensors to autonomous systems. The session will highlight architectural considerations, performance benchmarks, and deployment case studies that demonstrate how LPDDR empowers edge inference chips to meet the demands of generative AI workloads. ...
Kai Zhao
SPE Field Applications Engineering
Rambus, Inc.
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Break
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3.20 pm
Automotive Solutions
Chairperson: Alex ZOU, Innosail
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GPU and RISC-V Collaborating for Smarter Automotive Solutions
Abstract: 1. RISC-V have a lot of potentials now and in the future, automotive is one of it target market. 2. Imagination (IMG) as GPU IP global leading provider, continue work closely with/contribute in RISC-V ecosystem 3. automotive comput ing: scalable, safe and open 4 automotive design points: flexibility , future workloads scoping, innovation for differentiation. 5. IMG GPU are essential for real time visualization , sensor fusion, display pipeline parallel AI workloads and safety-critical rendering. 6. IMG work closely with ecosystem partners and RISC-V communities to enhance vertical cooperation for auto market ...
Yin Huang
Head of Business Development
Imagination Technologies Group Ltd.
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DSP's success in Automotive SoC
Introduce the market trend and value of using DSP in automotive SoC, including image vision, radar, AI and infotainment applications in ADAS and IVI subsystem.
Wang Tong
Sr. Application Engineer
Cadence Design Systems, Inc.
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1.00 pm
Artificial Intelligence
Chairperson: James Liu, Shanghai Innovation Center
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Interface IP for AI Scale-Up and Scale-Out Infrastructure
The hot LLM is driving the demand for AI Infrastructure scale-up and scale-out. Cadence keeps up with market demand and provides very competitive interface IP to help the industry develop rapidly.
Kenny He
Cadence Sr Principal Application Engineer
Cadence Design Systems, Inc.
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Neural Video Processor IP the AI Engine for Video
Presentation of Allegro DVT's NVP300 Neural Video Processor IP and how it can serve as the AI Engine for Video.
Yujing Wei
VP Sales & Country Manager APAC
Allegro DVT
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A new era of on-device AI
Candida Sun
Sr. Application Engineer Manager
Imagination Technologies Group Ltd.
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Break
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2.20 pm
Artificial Intelligence (part 2)
Chairperson: James Liu, Shanghai Innovation Center
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VeriSilicon's High-Performance Vitality GPU-AI IP Empowers AI PCs and Cloud Gaming Servers
VeriSilicon’s next-generation Vitality GPU-AI IP delivers a comprehensive solution that integrates high-performance graphics rendering with AI acceleration, tailored for AI PCs and cloud gaming servers. Through architectural optimization, the IP significantly enhances computational performance and energy efficiency, supporting a wide range of parallel workloads and complex graphics processing to meet the diverse demands of AI and gaming applications. Backed by VeriSilicon’s rich IP portfolio and its unique SiPaaS (Silicon Platform as a Service) business model, the company offers customers flexible and efficient one-stop custom silicon services, enabling rapid adaptation to evolving market needs and driving continuous innovation and high-quality development across the semiconductor industry. ...
Huiming Zhang
Sr. Vice President of GPU/Display Product, VeriSilicon
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
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Scaling AI Infrastructures for the Future with Next-Gen Interconnects
Clark Zuo
Applications Engineering, Principal Engineer
Synopsys, Inc.
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RISC-V Vector Compute for AI
Franky Fan
Principal Field Application Engineer
Sifive, Inc.
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Break
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3.40 pm
Security Solutions
Chairperson: James Liu, Shanghai Innovation Center
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How to Build Robust Security into Your AI SoC Designs
Matthew Ma
Senior Staff FAE
Synopsys, Inc.
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Protecting Data in Motion with MACsec
As companies adopt high-performance computing, AI workloads, and cloud-edge architectures, protecting data in motion within and across networks is a growing imperative. This presentation will examine a critical technology that addresses this challeng e: MACsec (Media Access Control Security). The presentation will explore how MACsec secures Layer 2 Ethernet communications against eavesdropping, replay, and man-in-the-middle threats. In addition, given how Ethernet technology continues to scale and proliferate across the application space, current and future implementations of MACsec from the data center to the automotive market will be discussed. ...
Kevin Zhang
SPE Field Applications Engineering
Rambus, Inc.
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Advancing SoC debug and optimization with functional monitoring
As modern System-on-Chip (SoC) designs have evolved to unprecedented levels of complexity, particularly with the emergence of high-performance computing, generative AI, and multi-chiplet technology, traditional debug and test solutions have become in sufficient for meeting current quality, reliability, performance, and predictive maintenance requirements. To address these challenges and accelerate time-to-market while maintaining system performance and reliability standards, a scalable system of embedded functional monitors, Tessent Embedded Analytics, provides critical visibility into device behavior during actual software execution. ...
Wei Zheng
Staff Application Engineer
Siemens - Tessent Embedded Analytics
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4.30 pm
Do not miss the Lucky Draw sponsored by
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