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A guide to accelerating applications with just-right RISC-V custom instructions

With RISC-V, standard extensions can be used to configure the base processor...

www.ednasia.com, Jun. 12, 2020 – 

The open instruction set architecture (ISA) of RISC-V permits broad flexibility in implementation and offers optional features that can enable fresh approaches to resolving hardware-software design tradeoffs. Based on a modular structure, a number of standard extensions and options can be used to configure the base processor as a starting point. Yet the true value actually lies in the opportunities that RISC-V offers developers to create new extensions, instructions and configurations that uniquely meet the needs of their innovative application ideas.

The software challenge for fixed ISAs

Traditionally, ISAs have been the intellectual property (IP) of commercial organizations who either wanted to sell microprocessors or microcontrollers, or who want to license their designs for others to use. Embedded developers are left to execute benchmarking software to determine which solution is best optimized for their application needs. Due to the cost of developing an independent ISA with all the necessary ecosystem, semiconductor vendors had been increasingly relying on the standard fixed ISAs offered by the mainstream IP providers, relying on Moore's Law and integrated peripherals to deliver differentiation, such as ultra-low power, to their customers.

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