Spin-Orbit-Torque Tackles MRAM Constraints

By Gary Hilson, EETimes (September 27, 2021)

The next generation of embedded MRAM (magneto-resistive RAM) may boil down to changing the order of ingredients in the recipe.

Spin-orbit-torque (SOT) MRAM addresses the “trilemma” that Spin-transfer torque (STT) MRAM currently faces, said Antaios CEO Jean-Pierre Nozières in an interview with EE Times. The significant voltage across the device tunnel oxide that’s required for writing means there is a continual tradeoff between data retention, write endurance, and write speed. That means even though it’s reached near maturity, STT MRAM is still constrained when it comes to meeting the demands of high-speed RAM applications that require a combination of high speed and infinite endurance, along with acceptable data retention.

Founded in 2017, Antaios began ramping its development efforts on third generation MRAM in 2019 by using SOT, a spintronic effect, that shows a lot of promise in overcoming the constraints of STT-MRAM and other previous generations of the technology, without requiring major changes to manufacturing processes, said Nozières. SOT-MRAM solves the trilemma by fully eliminating the high voltage across the device tunnel oxide during write, which results in intrinsic unlimited endurance. “The current technology is limited to embedded flash replacements. You have the trilemma between retention, speed and endurance.” By removing this constraint, he said, it opens the door to replacing incumbent memories including flash and SRAM in applications for high-speed applications that previous generations couldn’t address.

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