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Interlaken IP Core for high-speed chip-to-chip applications is now available

Oct. 07, 2021 – 

Copenhagen, Denmark -- October 7, 2021 - Comcores ApS, a fast-growing specialized supplier of Intellectual Property (IP) Cores expands its Chip-to-chip Interface IP portfolio by announcing the availability of a high-performance Interlaken IP.

Comcores as the leading provider of silicon-proven JESD204B and JESD204C Controller IPs, now introduces a high-performance Interlaken IP, a silicon and PHY agnostic implementation of the Interlaken Protocol version 1.2 targeting any ASIC or FPGA technologies.

Comcores Interlaken IP supports up to 2.6Tbps high-bandwidth performance and comes with an integrated Media Access layer. The IP has an extensive feature-set available and allows scalability in both number of lanes and lane speed.

Key Benefits of the Interlaken IP:



Interlaken IP Cores

About Comcores

Comcores is a Key supplier of digital IP Cores and design services for digital subsystems with a focus on Ethernet Solutions, Wireless Fronthaul and C-RAN, and Chip to Chip Interfaces. Comcores’ mission is to provide best-in-class, state of the art, quality components and design services to ASIC, FPGA, and System vendors, and thereby drastically reduce their product cost, risk, and time to market. Our long-term background in building communication protocols, ASIC development, wireless networks and digital radio systems has brought a solid foundation for understanding the complex requirements of modern communication tasks. This know-how is used to define and build state-of-the-art, high-quality products used in communication networks.

To learn more about this solution from Comcores, please contact us at sales@comcores.com or visit www.comcores.com.

Interlaken IP Core for high-speed chip-to-chip applications is now available

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