RISC-V Opens the Door on 48-bit Computing

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www.hpcwire.com, Jul. 07, 2022 – 

There's a growing interest among silicon providers backing RISC-V to introduce 48-bit computing in custom chips to meet their specific requirements.

The 48-bit long instructions focus is more as a middle ground between 32-bit and 64-bit, which has largely been the focus of chips and instruction sets until now.

"RISC-V is not pushing any 48-bit instructions right now. But there are some members who are doing custom instructions that are 48-bit... and it is mostly driven by immediate values," said Mark Himelstein, chief technology officer at RISC-V International.

RISC-V is an open-source instruction set architecture that companies can license for free and then modify to their own needs.

The RISC-V design is modular, meaning that companies can add or subtract modules depending on their requirements. The instruction set is a common tissue on which compute cores – which could be for graphics, artificial intelligence, vector cryptography, etc. – can be linked.

SiFive has developed its own RISC-V processor called the P650 which it has compared to Arm's Cortex-77 chip. Intel is also working with Barcelona Supercomputing Centre to develop a RISC-V high-performance chip, and is investing billions to make chips based on all major architectures including RISC-V.

The RISC-V architecture is popular in controllers and embedded applications, which are largely 16-bit and 32-bit. Himelstein said that 48-bit instructions may be gathering steam in embedded computing. He added there also conversations on 128-bit instructions in the RISC-V community.

Companies had to rely on getting instruction sets from the big vendors every few years, and either needed a lot of money or influence to get customized chips. RISC-V cuts that reliance and provides a free framework so companies build chips to meet their own computing needs, Himelstein said.

"When you want to add some big prime number or something to a register, that's harder, because you've run out of bits and places to put them. The people who are doing 48-bit have a very large immediate field. The reason they want to do that is their only other choice is to load that value from memory into a register and then add it. If they have it as part of the instruction stream, they don't have to do that. And in certain workloads, that's a benefit," Himelstein said.

The focus on 48-bit instructions is to move up from 32-bit, but not get to 64-bit, chip experts said.

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