Rambus Spins 6.4 GT/s DDR5 Registering Clock Driver for Speedier Servers

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The latest chip from Rambus raises the speed limit for DDR5, giving memory-hungry applications, such as data center servers, more room to run.

https://www.allaboutcircuits.com/, Feb. 07, 2023 – 

Marking a leap forward in DDR5 memory performance, Rambus announced the availability of its latest registering clock driver (RCD) chip enabling transfer speeds up to 6400 MT/s. As CPU frequencies and core counts increase, memory can quickly create a system bottleneck if its performance is not commensurate with the performance of the CPU, a problem that Rambus hopes to address with its RCD.

Especially in the case of data centers, memory bandwidth is of paramount importance in modern computing. DDR5 memory is poised to offer an incremental improvement over DDR4 in the near future while raising the theoretical maximum performance for memory in the long term. The RCD plays a crucial role in server-grade memory performance, making Rambus's contribution an important milestone in the DDR5 journey.

In order to gain more insight into the specific benefits offered by their latest RCD, we interviewed John Eble, VP of Engineering, Datacenter Products at Rambus to get his insights on the significance of this technology for system designs leveraging DDR5 DRAM.

We're Gonna Need a Bigger DIMM

With an ever-increasing interest in AI/ML and HPC applications, data centers are now hungrier than ever for high-performing memory. To put double data rate (DDR) DRAM into context, the DDR4 standard for computer memory is nearing its maximum theoretical transfer speed. And, as such, DDR5 is needed to allow continued scalability of memory.

This becomes especially true considering trends in the CPU market are pointing toward a higher number of cores in lieu of pure clock frequency, as the latter comes with decreased power efficiency. For HPC applications in particular, high-performing RAM is necessary to ensure maximum computational efficiency–a dynamic that John Eble understands well.

This becomes especially true considering trends in the CPU market are pointing toward a higher number of cores in lieu of pure clock frequency, as the latter comes with decreased power efficiency. For HPC applications in particular, high-performing RAM is necessary to ensure maximum computational efficiency–a dynamic that John Eble understands well.

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