Spanish startup performs RISC-V open core surgery

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Spanish startup SemiDynamics has developed fully configurable 64bit RISC-V processor IP for high performance chip designs in AI, Machine Learning (ML) and High-Performance Computing (HPC).

www.eenewseurope.com/, Apr. 17, 2023 – 

The customisable cores are process agnostic with versions already being supplied down to 5nm and use a new architecture for memory management, SemiDynamics CEO and founder, Roger Espasa tells eeNews Europe.

"The change to RISC-V is driven by the customer need to be able to change the silicon rather than a cost play," Espasa tells Nick Flaherty. "What they are looking for is inventing instructions, adding something to the core to justify their investment in silicon. You don't do it to plug and play a few IP cores. It's for a secret sauce that solves a problem in the market."

The company was established in 2016 and has worked on several high performance massively multicore designs.

"We have an HPC background and we know what it takes to move a lot of data so we have a lot of knowledge in AI and HPC to help customers all over the place, not just in HPC. We do that by being willing to do open core surgery on our cores, customising for their problem," he said.

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"We enjoy taking our knowledge on high performance cores where our customers realise that caches are not solving their problems. We have a customer with an AI design at 5nm with vector units and we also have a customer for packet processing with high frequency processing with over 50 instructions to be added to the core."

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