Samsung's 2nd-Gen 3nm Process, SF3, Has Begun Trial Production

Find the Latest SoC Solutions
for... Automotive... IoT... Security... Audio... Video

Samsung Foundry has reportedly begun trial production of chips on its 2nd Generation 3nm-class process technology, known as SF3. This development marks a significant milestone in the semiconductor industry, as Samsung competes with TSMC for supremacy in the upcoming mass production of advanced process nodes.

www.gizchina.com/, Jan. 21, 2024 – 

According to Chosun Ilbo, a popular and authoritative news outlet in South Korea, Samsung is now producing the 2nd-Gen 3nm process chip, SF3 on trial. The report claims that Samsung expects to hit yield rates of over 60% within the next six months.

Digitimes reported that Samsung is testing the performance and reliability of chips manufactured on the SF3 node. This is the first chip using Samsung's SF3 process and is expected to be an application processor designed for wearable devices. Most likely, the company will release this chip just in time for the Samsung Galaxy Watch 7 and other devices.

SF3 PROCESS: A BREAKTHROUGH IN SEMICONDUCTOR TECHNOLOGY

The SF3 process is a 3nm-class technology that builds upon Samsung's first-generation 3nm process. This new process is expected to lead the AI era, as it will enable the production of more efficient and powerful chips. The trial production of SF3 chips is a crucial step towards the full ramp of the SF3 node. After the trial production, the company will commence the full-scale production probably later this year. Chosun Ilbo says it expects Samsung to also use this node for the Exynos 2500 chip. The Exynos 2500 will likely launch with next year's Samsung Galaxy S25 series.

Samsung has previously stated that it plans to start large-scale mass production of SF3 chips in the second half of this year. The company will focus on the production of its 3nm chip SF3 (3GAP) and its better version SF3P (3GAP+) this year. As for the 2nm node, Samsung has since confirmed that it will roll out its plans in two years.

According to Samsung, the SF3 node can enable different gate-all-around (GAA) transistor nanosheet channel widths within the same cell, providing greater design flexibility. This can also bring lower power consumption and higher performance to the chip, and increase transistor density through optimized design.

click here to read more...

 Back