- 2-16Gbps Die-to-Die (D2D) Multi-Protocol IO Supporting BOW, OHBI and UCIe
- 25-112Gbps Extra Short-Reach (XSR) Multi-Standard SerDes (MSS)
- D2D PHY (Die-to-Die Interface)
- D2D Controller IP (Die-to-Die Interface)
- DesignWare Die-to-Die Controller IP with AXI Interface
- DesignWare Die-to-Die PHY IP in TSMC N7 Process
- More Products...
IP-SOC DAYS 2025 IP-SOC DAYS 2024 IP-SOC DAYS 2023 IP-SOC DAYS 2022 IP-SOC DAYS 2021 IP-SOC 2024 IP-SOC 2023 IP-SOC 2022 IP-SOC 2021
|
|||||||
![]() |
|

IP players prominent in chiplet's 2024 diary
- Keysight Supports Post-Quantum Cryptography Evaluation (Jul. 24, 2025)
- Mixel Supports Automotive SerDes Alliance (ASA) Motion Link SerDes IP (Jul. 23, 2025)
- TSMC to Exit GaN, Focus on Advanced Packaging (Jul. 23, 2025)
- UMC Announces Software Acquisition and Upcoming Earnings Release (Jul. 23, 2025)
- Arteris Selected by Whalechip for Near-Memory Computing Chip (Jul. 22, 2025)
- See Latest News>>
Chiplets–discrete semiconductor components co-designed and manufactured separately before being integrated into a larger system–are emerging as a groundbreaking approach to addressing many of the challenges faced by monolithic system-on-chip (SoC) designs. They have also become a major venue for increasing transistor density as Moore's Law slows down.
www.edn.com, Dec. 02, 2024 –
IDTechEx report "Chiplet Technology 2025-2035: Technology, Opportunities, Applications" asserts that the chiplets approach resembles an SoC on a module, where each chiplet is designed to function in conjunction with others, necessitating co-optimization in design. Moreover, chiplets are increasingly associated with heterogeneous integration and advanced packaging technologies.
While large semiconductor outfits like AMD and Intel were initially prominent in the chiplets world, IP players are now increasingly visible in showcasing the potential of chiplets. That includes established IP players like Arm and Cadence as well as upstarts such as Alphawave Semi.