D&R News Alert
www.design-reuse-embedded.com
www.design-reuse.com
www.design-reuse-china.com
October 13th, 2022
In this issue
• Cadence and Google Cloud Collaborate to Advance the Electronic System and Semiconductor Design Ecosystem
• How to accelerate memory bandwidth by 50% with ZeroPoint technology
• Intel’s Road to a Universal Quantum Computer Is Via Chiplets
• eFPGA expands the ecosystem footprint one deal at a time
$var->USER_FIRSTNAME

Welcome to the issue of October 13th, 2022 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.


Samsung Foundry Forum & SAFE™ Forum 2022 Japan

• Date: October 18th, 2022
• Venue: Hilton Tokyo Odaiba, Tokyo

Register Now
Samsung foundry forum

Foundry Ecosystem
Synopsys SLM
The foundation for Silicon Lifecycle Management

A DFT and silicon monitoring network through an integrated functional interface:

• Leverage SLM HSAT & Synopsys TestMAX
• Synopsys TestMAX ALE to access silicon throughout its lifecycle and reduce test
   time/cost
• PCIe, USB, SPI, 1149.10, etc. interfaces supported
Read More >>

Design and Verification Platform
Industry Article
 ❖ How to accelerate memory bandwidth by 50% with ZeroPoint technology

Featured Design Center

ADTechnology
 ❖ ADTechnology
Caliber
 ❖ Caliber Interconnect Solutions - Embedded Product Engineering

Wireline IP
CAST
Low-Latency & Scalable
1G/10G TCP/IP Hardware Stack

• Supports TCP, UDP, IP, VLAN, ARP, ICMP, IGMP, DHCP
• Efficient Flow & Congestion control, easy-to-use API
• Up to 32k TCP sessions, flexible filtering
• Optional Ultra-Low Latency, Cut-through Operation
Learn more...

RISC-V
Blog
 ❖ Arteris System IP Meets Arm Processor IP

Quantum Computing
eFPGA
Security
High-quality IP for your silicon solutions Softnautics
• USB 3.2 - Host, Device, Dual-Role-Device & Re-timer Controllers
• AES - 128 & 256 bits support
• SHA-1/2/3 Crypto Core
• Reed-Solomon FEC Codec - Based on IEEE 802.3bj
• Erasure Codec - Data Security

Partner Business News
Semiconductor News





You missed D&R News Alert of last week?

Catch up with 5mn Podcasts about what you should not miss that week
Stay Connected!

What they said at
IP SoC China 22

The opportunity and challenge for China Semiconductor
Bulu Xu,Cherie Su, SSIPEX

The Breakthrough of Domestic High-End IP and Custom ASIC in Advanced Process Nodes
Zachary Gao, Technical Director, Innosilicon Technology Ltd

IP Subsystems for Edge and Accelerators
Jensen Xin, IP FAE & ASIC TSM, OpenFive

IP Cores for the Metaverse
Charles Kim, Marketing Manager, Siliconarts, Inc.

Why silicon Proven is NOT what you think?
Michael Lei, Senior FAE, Agile Analog

Essential IP for the Enablement of Silicon Lifecycle Management
Alex Yu, Sr Mgr, Solutions, Synopsys Silicon Realization Group, Synopsys, Inc.

Which media vehicle for serving an IP soc community?
Gabriele Saucier, CEO & Founder, Design And Reuse

REGISTER:
If this newsletter was forwarded to you by a colleague, you can have it sent directly to you at no cost. To register for D&R SoC News Alert, go to: https://www.design-reuse.com/users/signup.php

UPDATE YOUR PROFILE / UNSUBSCRIBE :
You are subscribed as $var->USER_MAIL and you receive this Alert in html format.

* If you wish to unsubscribe, you can do it there:
https://www.design-reuse.com/users/alert.php?u=$var->USER_ID&e=$var->USER_MAIL