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IP cores for Edge AI in XR devices

Overview

Battery-powered extended reality (XR) devices need to sense and analyze their environments within the response time of the human senses to provide instant visual and aural feedback towards the user. And do so with extremely low power consumption and with ultra-low latency. The easics solution meets these demands with their compact nearbAI semiconductor IP cores and its unique L3-Optimizer technology for low power + low latency + low area balance. The digital IP cores are optimized for integration in ASICs and ASSPs inside XR devices.

nearbAI IP cores are highly efficient neural network inference engines, configurable for an extensive and growing range of AI models and use cases optimized for energy consumption, performance and area. nearbAI powers functions such as scene segmentation and reconstruction, object and face detection and recognition, foundational to consumer and enterprise XR applications.

Ideal for mobile XR processor chips and even fits in the most compact near-sensor AI chips:

Extreme optimization
- Proprietary L3-Optimizer: low power + low latency + low area balance
- Scaled and tuned to the application, yet field upgradable
- Record-breaking MAC utilization up to 95%
- Wide-ranging configurable number of MACs: 16 to 4096
- Configurable MAC accuracy, independent coefficient and data quantization, 4 to 16-bit, single bit granularity
- Configurable internal memory bank sizes and bus widths

Low power
- As low as sub 10 milliwatt

Ultra-fast response time
- Face detection in 2 milliseconds

Zero-latency switching
- Continuous multiplexing between multiple neural networks on the same nearbAI core, saving silicon area

Support for any sensor
- RGB, ToF, NIR, thermal IR, LiDAR, hyperspectral, stereo, ultrasound, audio

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