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Overview

The DesignWare® ARC® EM22FS Safety Processor simplifies development of safety-critical applications and accelerates ISO 26262 certification of automotive system-on-chips (SoCs). The ASIL D compliant EM22FS processor is a preverified dual-core lockstep implementation including a self-checking safety monitor. There is also an option to run the cores in an independent dual core mode for ASIL B or non-automotive applications requiring higher performance based on the same design. A tightly coupled architecture is supported such that the interrupt controller, MPU, watchdog timer, and options such as uDMA and FPU are instantiated within the main and shadow core for full redundancy. The ARC EM22FS processor is supported by comprehensive safety documentation including FMEDA reports and the ARC MetaWare Toolkit for Safety with ASIL D Ready certified compiler to generate ISO 26262 compliant code.

Benefits

  • The ARC EM22FS processor includes hardware safety features that simplify the implementation of safety in an SoC and ease the ISO 26262 certification process.
  • The safety processor supports error detection and correction logic (ECC) for data and address errors on closely coupled memories.
  • Also, hardware stack protection is included to check overflow and underflow of reserved stack space.
  • An integrated watchdog timer helps recover from a deadlock situation.
  • The integrated memory protection unit (MPU) defines variable regions and assigns access attributes to help protect against malicious or misbehaving code in critical applications.

Applications

  • ADAS SoCs
  • Automotive sensors
  • Automotive controllers

Tech Specs

Market SegmentAutomotive
Maturity Available On Request

Features

  • Dual-core lockstep safety processor supports ISO 26262 automotive safety standards
  • Single solution for Automotive Safety Integrity Levels B, C and D (ASIL B, C, D); Supports both ASIL D lockstep operation or ASIL B, C single-core operation
  • Includes hardware safety features: ECC, integrated user-programmable windowed watchdog timer, and lockstep safety monitor
  • Performance and area-efficient cores with up to 1.81 DMIPS/MHz and 360+ DMIPS/ mm2 (16FF) Support for DSP instructions
  • MetaWare Toolkit for Safety with ASIL D Ready certified compiler
  • Extensive safety documentation eases SoC certification process

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