AndesCore™ NX25 is a 64-bit CPU IP core for applications with memory usage greater than 4G bytes, which is the bound of 32-bit processors. NX25 let high performance computing with very little silicon footprint achievable by its AndeStar™ V5m Instruction Set Architecture, which combines the latest RISC-V RV64IMAC technology with Andes™ research in performance enhancements, also with the manually fine-tuned design that let the core operates fast as over 1 GHz at 28nm process. Multiple functional options are available to tailor the implementation to best fit target product applications. There are system level supporting functions with enhance features such as vectored interrupt for RISC-V Platform-Level Interrupt Controller (PLIC), and exception redirection for Debug Module. Andes Technology s comprehensive infrastructures of development environment for AndesCore® NX25 such as platform design, toolchain framework and service network are also provided.