The IP for 10 Gigabit Ethernet MAC is designed for use in 10 Gigabit Ethernet applications.
The XGM_GXL offers two mutually exclusive connections to the host interface or system bus. A 64 or 128 bit AXI interface can be used, or an external 64 bit FIFO interface can be used. The DMA block connects to external memory through its AMBA AXI bus interface. The DMA loads the transmit buffer and empties the receive buffer using bus master operations. Receive data is not sent to memory until the address checking logic has determined that the frame should be copied.