|
||
![]() www.design-reuse-embedded.com |
2D Graphics Rendering Engine
|
|
Overview Digital Blocks 2D Graphics Hardware Accelerator Verilog IP Cores consists of the DB9200AXI4, DB9200AXI, DB9200AHB, and DB9200AVLN. The DB9200 2D Graphics Rendering Engine IP Core (Verilog Cores DB9200AXI4, DB9200AXI, DB9200AHB) contains all the features of the DB9100, adding Geometry Drawing features.
The Digital Blocks DB9100 and DB9200 2D Graphics Hardware Acceleration Engine Verilog IP Cores integrates into ASIC, ASSP, & FPGA devices, providing programmable hardware acceleration of 2D graphics function under a host processor direction.
Please sign in to view full IP description :
|
Partner with us |
List your ProductsSuppliers, list and add your products for free. |
More about D&R Privacy Policy© 2024 Design And Reuse All Rights Reserved. No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse. |
||||||