www.design-reuse-embedded.com
Search Solutions  
OK
243 "Security Solutions" SoCs

1
3DES-ECB 1 Billion trace DPA resistant cryptographic accelerator core
Rambus Crypto Accelerator 3DES-ECB Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consumpti...

2
Active mesh against tampering attacks - Active Shield
Attacks against digital circuits can be performed by directly tampering with the device s internal structure. These attacks are intrusive, and regroup attempts to directly probe or force signals, remo...

3
AES (ECB), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores
Rambus Crypto Accelerator AES-AE-Fast Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consum...

4
AES (ECB-CBC-CFB-CTR), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores
Rambus DPA Resistant AES-FBC Cryptographic Accelerator Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the powe...

5
AES CCM/GCM Engine
The EIP-39 AES Accelerators implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O reg...

6
AES Engine
The EIP-36 AES Engines implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O register...

7
AES GCM/XTS Engine
The EIP-38 - AES/GCM/XTS/LRW Engines are specifically suited for next generation processors deployed in networking and storage appliances that need to support combinations of AES (with its regular fee...

8
AES Key Wrap Engine
The EIP-37 is the IP for accelerating the AES Key Wrap cipher algorithm (NIST-Key-Wrap & RFC3394). Designed for fast integration, low gate count and full transforms, the EP-37 accelerator provides a r...

9
Anti Row-Hammer / Memory Attacks
The Anti Row-Hammer IP takes part in Memory Controller in order to protect the Memory against Rowhammer Attacks, especially on RAM. This IP is able to determine if the number of access requests to a M...

10
ARC4 Engine
The EIP-44 is the IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec).

11
ARIA Engine
The EIP-11 ARIA algorithm, as specified in RFC 5794. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling and GHASH. Besides the...

12
Basic AES Engine
The EIP-32 AES Engines implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O register...

13
Boot Protection Pack / Root-of-Trust
The Boot Protection Pack is a solution provided by Secure-IC to ensure a Secure Boot function. The Boot Protection Pack provides a secure root-of-trust with a high level of resistance against malevole...

14
Camellia Engine
The Camellia Engine implements the Camellia crypto algorithm, as specified in Specification of Camellia and RFC3713.

15
Camogates: protects against reverse-engineering
The Secure-IC s CamoGate IP has for goal to protect a circuit against reverse-engineering. Reverse engineering of an Integrated Circuit is a process which aims at identifying its structure, design and...

16
ChaCha20 Engine
The EIP-13 ChaCha engine implements the ChaCha20 algorithm, as specified by [ChaCha]. The accelerators include I/O registers and an encryption/decryption core. Designed for fast integration, low gate ...

17
Circuit Camouflage Technology
Rambus Circuit Camouflage Technology (formerly Inside Secure), also known as SecureMedia Library (SML), is an anti-reverse engineering and anti-cloning protection for integrated circuits that has both...

18
Circuit Camouflage Technology
Inside Secure Circuit Camouflage Technology, also known as SecureMedia Library (SML), is an anti-reverse engineering and anti-cloning protection for integrated circuits that has both Commercial and Government Applications.

19
Code Protection: Instilling trust into your applications
Inside Secure s Code Protection technology provides powerful automated software protection tools applicable across Mobile, IoT, Desktop and Server platforms.

20
Content Protection (HDCP) 2.2/2.3 embedded security modules (ESMs) for HDMI, DisplayPort, and USB 3.x Type-C interfaces

Synopsys offers highly integrated and proven security solutions spanning silicon cores to embedded software to help content owners, service providers, network operators, embedded system OEMs and So...


21
Content Protection Client, Downloadable secure DRM Agent with advanced Player
Multimedia consumers expect easy and convenient access to the latest movies and TV shows wherever they are. Inside Secure enables content and service providers to securely deliver premium content to virtually any connected device the way users want it, online or offline, for use cases like video-on-demand, live and catch-up TV.

22
Content Protection Server
Inside Secure Content Protection Server is a fifth generation, interoperable, server-side Digital Rights Management (DRM) solution. Designed for wireless and wireline operators and service providers, Content Protection Server implements and extends multiple DRM technologies such as Microsoft PlayReady and Google Widevine DRM while providing common integration interfaces.

23
CryptoCell-300 - Platform Security Solution for Devices with Strict Power and Area Constraints
The Arm CryptoCell-300 family of embedded security solutions serves high-efficiency systems with a small footprint and low power consumption.

24
CryptoFirewall Cores
Providing superior security and tamper resistance, while being highly-cost effective. Our cores complement existing security implementations, and are ideal for preventing counterfeiting in a broad number of applications.

25
Cryptographic Accelerator Core SHA-2-Compact
Rambus Crypto Accelerator SHA-2-Compact Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power cons...

26
Cryptographic Accelerator Core SHA-2-Full
Rambus Crypto Accelerator SHA-2-Full Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consump...

27
Cryptography IP solutions, Public Key Accelerators (PKAs) and True Random Number Generators (TRNGs)

Synopsys offers a broad portfolio of silicon-proven DesignWare® Cryptography IP solutions that includes symmetric and hash cryptographic engines, Public Key Accelerators (PKAs) and True Random ...


28
CryptoManager Root of Trust - CryptoManager RISC-V Root of Trust Programmable Secure Processing Core
The CryptoManager Root of Trust is a fully-programmable hardware security core that protects against a wide range of attacks with state-of-the-art anti-tamper and security techniques to offer vendors security by design.

29
CryptoManager Security Engine
CryptoManager Security Engine is an in-device root-of-trust offered as an embedded hardware core, or as a software agent that can be implemented as a protected element in a trusted OS or directly in the high-level device OS for the secure provisioning of keys and features throughout the device lifecycle. This provides flexible implementation options and allows the CryptoManager Infrastructure to securely communicate with the device to provision keys and manage feature configurations in the supply chain and downstream ecosystems.

30
CryptoManager Security Platform
From chip management to device personalization to downstream feature provisioning, the CryptoManager security platform creates a trusted path from the SoC manufacturing supply chain to downstream service providers with a complete silicon-to-cloud security solution.

31
CryptoManager Trusted Services Security Solutions
The Rambus CryptoManager Trusted Services support a variety of root of trust configurations via a hardware core or secure software, providing a scalable and flexible security solution. Our solutions s...

32
Cryptomedia Content Protection Core
Designed to cost-effectively secure the broadcast and streaming of digital content, our CryptoMedia Content Protection Core provides pay TV operators and over-the-top (OTT) media providers robust secu...

33
CryptoMedia Security Platform
Designed to protect high-value content, including 4K UHD and High Dynamic Range (HDR) programming, CryptoMedia Security Platform is a comprehensive suite of components that enables consumers to securely and easily store, copy and share premium content across multiple devices.

34
DES/3DES engine
As part of Rambus award-winning silicon Intellectual Property (IP) product portfolio, the EIP-16 DES/3DES Engines implement the DES and 3DES algorithm, as specified in Federal Information Processing ...

35
Device Secure Debug
The Joint Test Action Group (JTAG) is the IEEE1149.1 Standard Test Access Port (TAP) and Boundary Scan Architecture. Giving a full access to the internal system components of the device, the TAP inter...

36
DPA & Fault Injection Resistant AES-AE Cryptographic Core
Rambus DPA & Fault Injection Resistant AES-AE Cryptographic Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. AES-AE 1 Billion...

37
DPA & Fault Injection Resistant AES-ECB Cryptographic Core
Rambus DPA & Fault Injection Resistant AES-ECB Cryptographic Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. AES-ECB 1 billi...

38
DPA Countermeasures
Our Cryptography Research division discovered Simple Power Analysis (SPA) and Differential Power Analysis (DPA), and developed fundamental solutions and techniques for protecting devices against DPA and related side-channel attacks, along with supporting tools, programs, and services.

39
DPA Resistant Cryptographic Accelerator Core 3DES-ECB
Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. 3DES-ECB 1 Billion trace DPA resistant cryptog...

40
DPA Resistant Cores
The DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC. These superior performance cores are easy to integrate into SoCs and FPGAs, providing robust side-channel resistance across different security and performance levels.

 | 
 Previous Page
 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 
Next Page 
 | 
 Back

Partner with us

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2022 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.