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65 "Cryptography" Solutions

1
ARIA Crypto Engine
The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea.

2
BA452 secure connection IP core
The BA452 is a secure connection engine that can be used to off-load the compute intensive Public Key operations.

3
Chacha20-Poly1305 HP
Chacha20-Poly1305 high performance IP core for authenticated encryption.

4
Crypto Coprocessor
The Cryptographic Coprocessor (or CryptoSoc Accelerator) is a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA (Intel SoC, Xilinx Zynq) and ASIC.

5
Cryptography IP solutions, Public Key Accelerators (PKAs) and True Random Number Generators (TRNGs)

Synopsys offers a broad portfolio of silicon-proven DesignWare® Cryptography IP solutions that includes symmetric and hash cryptographic engines, Public Key Accelerators (PKAs) and True Random ...


6
eSecure : Single module for multiple security challenges
The eSecure IP is a complete standalone module that enables security applications by shielding the secret information from the non-secure application running on the main processor.

7
Security Protocol Accelerators provide increased performance, ease-of-use, and advanced security features
Synopsys offers two Security Protocol Accelerator (SPAcc) IP products: - DesignWare® Multipurpose Security Protocol Accelerator (Multipurpose SPAcc) - DesignWare LTE Security Protocol Accelerator (LTE...

8
SHA-3 hashing function
The BA418 is crypto engine IP core for SHA-3 hashing functions compliant to NISTS s FIPS 180-4 and FIPS 202 standards.

9
Silex Insight BA451 MACsec Engine
The BA451 is a very scalable engine implementing the MACsec standard for high throughput applications.

10
tRoot Hardware Secure Modules (HSMs)

The DesignWare tRoot Hardware Secure Modules (HSMs) offer silicon-proven, self-contained security solutions with Root of Trust for a wide range of applications, including IoT, industrial control, n...


11
AES Encrypt/Decrypt Core
The AES encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard.

12
CryptoManager Root of Trust - CryptoManager RISC-V Root of Trust Programmable Secure Processing Core
The CryptoManager Root of Trust is a fully-programmable hardware security core that protects against a wide range of attacks with state-of-the-art anti-tamper and security techniques to offer vendors security by design.

13
Ensigma Security (IPSec) Protocol Processing Engine
The high performance engine can process multiple gigabits of traffic with short IP packets (40 byte). Ensigma IPSec provides DMA type of interface for programming pointers to the security association data, packet pointers.

14
Ensigma Unified Security Engine (UNISec)
The Ensigma Unified Security Processor (USecP) combines the IPSec, MACSec and DTLS engines into a single unified multi-protocol processing engine supporting eight 1Gbps ports or one 10Gbps port.

15
Inside Secure Root-of-Trust
Designed to be integrated in power constrained microcontroller or complex SoC, Inside Secure Root-of-Trust Engine is the vault that guards the chip most sensitive assets and that establishes the platform security foundations.

16
MACsec-IP-160 - EIP-160 Single Channel flow through MACsec Engines, upto 100Gbps
The MACsec-IP-160 (EIP-160) is an IP family for accelerating MACsec up to 100 Gbps, serving single channel Ethernet designs.

17
Programmable Root-of-Trust Engine
Inside Secure Programmable Root-of-Trust features a RISC-V 32-bit CPU and is delivered with its application development framework.

18
Whitebox
Our proven Whitebox technology dissolves cryptographic keys into code. This hides it from anyone spying on the code or its execution. This is coupled with countermeasures (both cryptographic and obfuscation based) to defend against attacks on the Whitebox.

19
AES Encryption & Decryption with Fixed Block Cipher Mode AES-C
The AES-C IP Core implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key. An included configurable wrapper surrounds the AES-C core and implements its fixed Block Cipher mode of operation.

20
AES Encryption & Decryption with Programmable Block Cipher Mode AES-P
The AES-P IP Core implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key.

21
AES encryptor / AES decryptor - Symmetric Security Range
The family of IPX-AES IP-Cores provides an efficient FPGA implementation of the Advanced Encryption Standard (AES). Its flexibility allows the combination of several functions and operating modes for a very small FPGA footprint.

22
Anti-Tamper technologies
Attacks against digital circuits can be performed by actively disrupting the device or by directly tampering with the device’s internal structure. These powerful attacks regroup attempts to inje...

23
Authenticated Encryption & Decryption AES-GCM128
The AES-GCM128 IP Core implements the GCM-AES authenticated encryption and decryption, as specified in the NIST SP800-38D recommendation for GCM and GMAC and the FIPS-197 Advanced Encryption Standard. The core can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key.

24
Cryptographic library for Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA)
The Software ECC is a cryptographic library providing the main ECDSA and ECDH functionalities

25
DES Cryptoprocessor
This core is a fully compliant implementation of the DES encryption algorithm. Both encryption and decryption are supported. ECB, CBC and triple DES versions are available. Simple, fully synchronous d...

26
High-quality random generation
Random number generation is a keystone in security. Secure-IC offers both True Random Number Generator (TRNG) resilient to harmonic injection for statistically independent sets of bits generation and ...

27
HMAC-SHA1 Authentication & Hashing function
IPX-HMAC-SHA-1 IP-Core is the hashing function required for the content integrity check and content identification as specified in DCI document v1.2. It is designed for Xilinx and Altera devices.

28
NIST FIPS-197 Compliant Ultra-Low Power AES IP Core
ntAES8 core implements NIST FIPS-197 Advanced Encryption Standard. ntAES8 core can be programmed to encrypt or decrypt 128-bit blocks of data using a 128-bit, 192-bit or 256-bit key.

29
RSA Public Key Cryptography Exponentiation Accelerator
The modular exponentiation accelerator IPX-RSA is an efficient arithmetic coprocessor for the RSA public-key cryptosystem.

30
Secure 128-bit Advanced Encryption Standard (AES) coprocessor
The Secure AES Coprocessor encrypts and decrypts 128-bit data blocks by computing an AES algorithm with a 128, 192 or 256-bit key through a highly secure architecture (SPA, DPA[1] and fault hardened).

31
SHA-1 Secure Hash Function
TheSHA1 IP core is a high performance implementation of the SHA-1 Message Digest algorithm, a one-way hash function, compliant with FIPS 180-1.

32
SHA-256 Secure Hash Function
The SHA256 IP core is a high performance implementation of the SHA-256 Message Digest algorithm, a one-way hash function, compliant with FIPS 180-2. The core is composed of two main units, the SHA256 Engine and the Padding Unit as shown in the block diagram. The SHA256 Engine applies the SHA256 loops on a single 512-bit message block, while the Padding Unit splits the input message into 512-bit blocks and performs the message padding on the last block of the message.

33
Strong secret storage
Storing a secret in an electronic device implies leaving physical marks of the data stored, and thus is prone to direct reading or reverse-engineering. To avoid those traces, Secure-IC Strong Secret S...

34
True Random Number Generator
Secure-IC offers both True Random Number Generator (TRNG) resilient to harmoni c injection for statistically independent sets of bits generation

35
Tunable Cryptography
Secure-IC offers a broad range of Cryptography technologies to cover customers’ needs, from Symmetric Cryptography to Asymmetric Cryptography and Hash functions.

They are designed to strike t...


36
XTS mode AES Processor
The ntAES_XTS IP Core is fully compliant with AES-XTS algorithm standardized at NIST SP800-38E and IEEE 1619-2007 recommendations targeting disk encryption applications at sector (data unit) addressable level.

37
10G/25G/40G/50G AES Encryption Core
The 10G/25G/40G/50G AES Encryption Core is a high performance and yet low footprint AES engine for 10G/s - 50G/s application. Typical applications are providing bulk encryption for 25GE, 10GE, OTU3, O...

38
400G AES Encryption Core
The 400G AES Encryption Core is a high performance and yet low footprint AES engine for 400G/s application. Typical applications are providing bulk encryption for 400GE and OTUC4.

39
DOME - Device Ownership Management and Enrollment
Everyday there are millions of devices that enter the IoT that contain a processor that must be maintained, monitored and securely managed.

40
EC Ultra Elliptic Curve Cryptography Microprocessor
TeraFire EC Ultra IP cores accelerate EC point multiplies and ECDSA signs and verifies over NIST P-curves. Configurations can include as many P-curves as needed or can eliminate unnecessary curves to save system resources.

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