Founded in 2006 in Oregon’s Silicon Forrest, Trilinear Technologies is a premier supplier of high-quality digital processing technology for the video and display markets. Trilinear excels at developing complex solutions where feature integration and innovation is a premium while maintaining standards compliance and device interoperability. Our IP solutions are used in a wide array of consumer applications, including smartphones, tablet PCs, portable media players, home theater systems, set-top boxes, gaming devices, and digital TVs. Applications for products within professional markets include large touch screens, video servers, and video wall displays. Applications for products within automotive markets include whole car video systems and integrated navigation devices.   
10 Solutions

AVP-27 Frequency Domain Image Scaler
The AVP-27 Image Scaler is a real time video and image resizing engine that offers high quality results for demanding video applications. Using a multiple tap Finite Impulse Response (FIR) algorithm, the AVP-27 balances complexity and resource usage for an optimal solution capable of generating images suitable for display in large screen applications.

AVP-35 Content Adaptive Deinterlacer
The AVP-35 Content Adaptive Deinterlacer core provides advanced algorithms and high quality results for demanding video applications. The use of temporal processing combined with spatial processing allows for multiple level motion detection and the ability to analyze image details in order to enhance both large and small details.

AVP-47 Anisotropic Image Scal
The AVP-47 Anisotropic Image Scaler is a real time video and image resizing engine that offers an unprecedented level of image quality. Using a proprietary frequency-domain scaling algorithm, the AVP-47 dramatically sharpens image edges while minimizing artifacts at resolutions ranging from QCIF through FullHD.

DisplayPort 1.4 Transmitter Link Controller
The Trilinear VF-111T DisplayPort Transmitter core has been updated to include full support for the Video Electronic Standards Association (VESA) DisplayPort 1.4 standard.

M107TSD-MPEG-2 Transport Stream Decoder
The M107 Transport Stream Decoder parses MPEG-2 Transport Streams according to the ISO 13818-1 standard for MPEG-2 systems. The core performs the demultiplexing of video streams, audio streams, and section data.

M11-DV Digital Video Decoder
The M11 digital video decoder core provides standards compliant DV decoding using a high-performance and low gate count implementation. The fully synchronous core decodes 25Mbps, 50Mbs, and 100Mps DV streams recorded at either 50Hz or 60Hz. Using a complete hardware implementation, the M11 core is capable of operating with low CPU overhead while providing the highest quality results.

M2-MPEG-2 ML@HL Digital Video Decoder
This M2 digital video decoder core is designed specifically for applications that demand the highest in video quality. The core is capable of decoding Main Profile @ High Level bit streams using a high speed, direct-to-memory interface. The High level is supported for the decoding of all profiles which include the 720p and 1080i formats, frame rates up to 60 Hz, and compressed bit rates up to 80Mbits per second.

M25 DSC 1.2 Decoder
The M25 DSC 1.2 Decoder offers real time decompression of HD streams with resolutions from 480p up to 8K. The decoder core is fully compliant with the VESA DSC 1.2 standard and is available for both FPGA and ASIC platforms.

M27 DSC 1.2a Encoder
The M27 DSC 1.2 Encoder offers real time compression of high definition streams with resoltions up to 8K. Input video is provided to the encoder using an industry standard parallel data format with line and frame indicator signals. The output interface is AXI4-Stream Protocol compliant. The Encoder core supports 8, 10 or 12 bits per pixel using either the RGB or YCbCr in 4:4:4 or 4:2:2 format.

M4 H.264 Digital Video Decoder
The M4 Digital Video Decoder is a hardware only implementation providing high quality and high performance h.264 video decoding. The M4 core supports the Constrained Baseline and Main Profiles as well as providing optional support for the High4:2:2 profile.


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