时间：2025 年 9 月 11 日
地点：上海淳大万丽酒店,中国上海浦东联洋新社区迎春路719号
Join D&R IP SoC China 25 !! A worldwide connected Event !!
Co-organized with:
D&R IP-SoC China 2025 Day 是中国首个完全致力于IP（硅知识产权）和基于IP电子系统的独特全球性活动。
作为芯片设计业创新的种子，IP-SoC展商受邀展示他们最新的产品和服务，并分享他们对半导体行业下一步创新的展望。
IP用户可以一目了然地查看最新的技术趋势和令人兴奋的创新IP/SoC产品。通过全局视角，电子系统领袖可以识别颠覆性创新，带来新的细分市场增长。
本活动将是一次线下面对面会议。为了增强市场关注度，演讲材料和视频将同时发布在 www.design-reuse-china.com 和Youku上。
有任何问题吗？请与我们联系。
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⮞ Registration and booth install opens at 7.00 am
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9.00 am
Introduction
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IP vendor the seed of innovation in the semiconductor world
Gabrièle Saucier
CEO
Design And Reuse
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Status and Trend of China's IP
Dr. Xu
SSIPEX
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Your Trusted Turnkey Partner with One-Stop IP and SoC Platform Solutions
饶青
IP Project Director
Brite Semiconductor
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Chiplets
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Chiplets as an enabler for shorter Time-To-Market (TTM)
Chiplets are a new way to design in electronics: creating an application simply requires to stitch together already existing chiplets in a so-called System-in-Package (SiP). Cadence has already taped-out a chiplet targeting automobile industry, in 3 nm TSMC process. It embedded Secure-IC IPs to secure it and allow for a secure SiP assembly. Chiplet is the next paradigm for automotive market and datacenters, which are both software defined hence require a uniform hardware. In this paper, Secure-IC explains how security is enabling secure assembly of chiplets. Besides, we announce the Protection Profile drafting effort that we have undertaken.  ... 
Shengnan WANG
General Manager China
Secure-IC
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Mastering UCIe 2.0: Overcoming Fabric Management Hurdles for Chiplet Integration
Architect
Siemens EDA (Avery Design)
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UCIe-S v1.1 PHY IP：从仿真到流片的稳健设计方法与硅上实测结果
We will present our UCIe test results along with an overview of our development environment and methodology. This session will highlight key findings from our UCIe PHY testing, demonstrating performance and interoperability. Additionally, we will sha re insights into our structured development workflow, verification strategies, and collaborative environment designed to deliver high-quality, reliable IP solutions. ...
Roger Han
Strategy & Marketing Team Leader
Qualitas Semiconductor
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Connectivity
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《晟联科IOD，Scale-up生态“战国时代”的优选方案》
柳雷
解决方案经理
eTopus Technology Inc.
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Highspeed Connectivity Solutions for 22nm Tech Nodes
New applications in networking, in communications like 5G/6G and mmWave or in automotive with radar/lidar require high-speed data connectivity. This incurs data rates bigger than 20 Gbps per lane. These applications typically require chips that are p roduced in mainstream tech nodes, like GF 22DFX. When many data lanes are applied and active the power consumption of SerDes-based connectivity becomes an issue and can break an intended architecture. EXTOLL�s technology provides solutions for highest speeds at lowest power consumption enabling new future-proven systems. ...
Robert Kong
Extoll GmbH
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12.00 pm
Lunch Break
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1.00 pm
Analog and Memory IP
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Advancing Power Telemetry
Julian Hu
VP, China Sales
Movellus, Inc.
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PVT Monitors fulfilling the desire for increasing levels of control in advanced nodes for complete silicon lifecycle management in SoCs
Synopsys Silicon Lifecycle Management (SLM) PVT Monitor IP sets the industry standard for excellence. We provide hard IP that is complemented by dedicated PVT-Controller soft IP, enabling the creation of desirable monitoring subsystems. Our highly di fferentiated IP offers unparalleled accuracy, broader operating temperature and voltage ranges compared to the competition and provides customers with the confidence of fully silicon-verified solutions, accompanied by comprehensive silicon reports. As advanced nodes continue to evolve, the need for monitoring is expanding. Synopsys SLM PVT Monitor IP addresses the growing demand for process-related electrical and thermal condition data collection across all phases of an SoC's lifecyclefrom testing to real-time mission mode operation. Staying attuned to our customers' needs, we are actively expanding our portfolio with new monitoring subsystem solutions and increasing foundry coverage. The SLM PVT Monitor IP now offers expanded foundry coverage, including Samsung, in addition to TSMC's latest processes. These features make Synopsys SLM PVT Monitor IP highly differentiated, offering a unique value proposition unmatched by competitors in delivering a comprehensive, end-to-end total solution. ...
Xiaoxuan Li
Senior Staff Applications Engineer
Synopsys, Inc.
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Memory Subsystem
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Semiconductor IPs for Memory, Flash storage and wireless applications
Ravi Thummarukudy
CEO
Mobiveil Inc.
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Ensuring NVMe Infrastructure Readiness: Verification Before Live Migration
Ujjwal Negi
Senior Member Technical Sta
Siemens EDA (Avery Design)
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Memory Interface
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The Widespread Use of LPDDR Memory Subsystem
Minlin Fan
China Country Manager & VP of Sales
OPENEDGES Technology, Inc.
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Unlocking Generative AI at the Edge: How LPDDR enables Scalable & Efficient Intelligence
As generative AI continues to redefine the boundaries of creativity and automation, its true value is realized when inference is optimized for real-world deployment�especially at the edge. This presentation explores how inference serves as the crit ical enabler for delivering generative AI experiences that are responsive, efficient, and scalable. We will examine how LPDDR memory technologies, with their unique balance of high bandwidth, low latency, and cost efficiency, are ideally suited for edge AI applications�from smart cameras and industrial sensors to autonomous systems. The session will highlight architectural considerations, performance benchmarks, and deployment case studies that demonstrate how LPDDR empowers edge inference chips to meet the demands of generative AI workloads. ...
Kevin Zhang
SPE Field Applications Engineering
Rambus, Inc.
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Automotive Solutions
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GPU与RISC-V的协同赋能汽车智能化
Abstract: 1. RISC-V have a lot of potentials now and in the future, automotive is one of it target market. 2. Imagination (IMG) as GPU IP global leading provider, continue work closely with/contribute in RISC-V ecosystem 3. automotive comput ing: scalable, safe and open 4 automotive design points: flexibility , future workloads scoping, innovation for differentiation. 5. IMG GPU are essential for real time visualization , sensor fusion, display pipeline parallel AI workloads and safety-critical rendering. 6. IMG work closely with ecosystem partners and RISC-V communities to enhance vertical cooperation for auto market ...
黄音
Head of Business Development
Imagination Technologies Group Ltd.
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DSP在车载SoC领域的成功应用
介绍Cadence DSP在车用SoC芯片中的应用趋势和价值，包括在ADAS和座舱芯片上的视觉 、雷达、AI以及娱乐子系统中的应用。 ...
王桐
Sr. Application Engineer
王桐
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6.00 pm
Event Closure
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1.00 pm
人工智能
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用于 AI 纵向扩展和横向扩展基础设施的接口 IP
LLM的火热推动了AI基础架构规模化和横向扩展的需求。Cadence紧跟市场需求，৻ 2;供极具竞争力的接口IP，助力产业快速发展。 ...
何金强
Cadence Sr Principal Application Engineer
Cadence Design Systems, Inc.
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神经视频处理IP-视频AI引擎
Presentation of Allegro DVT's NVP300 Neural Video Processor IP and how it can serve as the AI Engine for Video.
韦裕京
VP Sales & Country Manager APAC
Allegro DVT
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开启Edge AI 与图形处理新时代
各类设备上的 AI 功能正在迅速演进，但AI系统设计者依然面临性能、效率 982;灵活性的多重挑战。Imagination凭借其长期深耕低功耗 GPU 的经验，成功实现了GPU架构对图形与AI的灵活支持。E-Series 结合了 GPU 的可编程性与 AI 性能的飞跃，为边缘智能（Edge AI） 系统开发者带来了极具吸引力的解决方案。 GPU作为可编程处理器，通过面向未来的架构设计，使设备能够持续应对 AI、计算和图形工作负载的演进。本次演讲将介绍E-Series神经核心如何通过在 GPU 内部深度集成 AI 加速能力，与更广泛的 GPU 及异构计算软件生态实现无缝协同 —— 其算力可通过OpenCL 等主流 API直接调用，开发者借助oneAPI、Apache TVM 或 LiteRT等开放标准工具，能轻松将工作负载迁移至神经核。Imagination的计算库与高度优化的图形编译器，进一步释放了GPU的全部潜能。 ...
孙千喆
Sr. Application Engineer Manager
Imagination Technologies Group Ltd.
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芯原高性能Vitality GPU-AI IP赋能AI PC和云游戏服务器
VeriSilicon’s next-generation Vitality GPU-AI IP delivers a comprehensive solution that integrates high-performance graphics rendering with AI acceleration, tailored for AI PCs and cloud gaming servers. Through architectural optimization, the IP significantly enhances computational performance and energy efficiency, supporting a wide range of parallel workloads and complex graphics processing to meet the diverse demands of AI and gaming applications. Backed by VeriSilicon’s rich IP portfolio and its unique SiPaaS (Silicon Platform as a Service) business model, the company offers customers flexible and efficient one-stop custom silicon services, enabling rapid adaptation to evolving market needs and driving continuous innovation and high-quality development across the semiconductor industry. ...
张慧明
Sr. Vice President of GPU/Display Product, VeriSilicon
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
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Scaling AI Infrastructures for the Future with Next-Gen Interconnects
左庆华
首席应用工程师
Synopsys, Inc.
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Security Solutions
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How to Build Robust Security into Your AI SoC Designs
Matthew Ma
Senior Staff FAE
Synopsys, Inc.
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Protecting Data in Motion with MACsec
As companies adopt high-performance computing, AI workloads, and cloud-edge architectures, protecting data in motion within and across networks is a growing imperative. This presentation will examine a critical technology that addresses this challeng e: MACsec (Media Access Control Security). The presentation will explore how MACsec secures Layer 2 Ethernet communications against eavesdropping, replay, and man-in-the-middle threats. In addition, given how Ethernet technology continues to scale and proliferate across the application space, current and future implementations of MACsec from the data center to the automotive market will be discussed. ...
Kai Zhao
SPE Field Applications Engineering, Silicon IP
Rambus, Inc.
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High Perfomance Computing
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解锁算力瓶颈：DRAM、SerDes、Chiplet IP 如何重塑高性能芯片架构
贾仪彬
IP&SoC Solution Architecture
Innosilicon
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6.00 pm
Event Closure
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