|
Overview
The logiSPI SPI to AXI4 Controller Bridge IP core from Xylon's logicBRICKS IP library enables easy inter-chip board-level interfacing between virtually any microcontroller (MCU) and Xilinx Zynq-7000 AP SoC and FPGAs through the Serial Peripheral Interface (SPI) bus. The SPI is a full-duplex synchronous four-wire serial interface between a single bus master, and one or more bus slave devices.
Please sign in to view full IP description :
Tech Specs
Part Number | logiSPI |
Short Description | SPI to AXI4 Controller Bridge |
Provider |