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Overview
The Digital Blocks DB9000AHB-Lite TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 3.0 AHB-Lite Bus V1.0 to a TFT LCD panel. In an FPGA, ASIC, or ASSP device, the microprocessor is typically an ARC, ARM, Intel, MIPS, OpenSPARC, PowerPC, or Tensilica processor and frame buffer memory is either on-chip SRAM memory or larger off-chip SRAM or SDRAM.
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Tech Specs
| Part Number | DB9000AHB-Lite & DB9000AHB5 |
| Short Description | Display Controller - LCD / OLED Panels (AHB-Lite Bus) |
| Provider | |
| Maturity | Successful in Company SoC Demo Reference Design & Customer Implementations |
| Foundry | Chartered, SMIC, LSI, IBM, STMicroelectronics, Silterra, UMC, OKI |
| Target Process Node | Chartered, IBM, LSI. OKI, Silterra, SMIC, STMicroelectronics, Tower, TMSC, UMC, Global Foundaries |