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Overview
HDMI receiver PHY (Physical layer) is a single-port IP core which is fully compliant with HDMI 1.4 specification. This HDMI RX PHY supports from 25MHz to 225MHz TMDS clock, and offers a simple implementation for system LSI for consumer electronics like HDTV. The HDMI receiver PHY performs most efficiently with HMDI receiver link IP core. It is Silicon Proven in many Fab/Nodes including: (TSMC, UMC, SMIC, GF, Samsung, STMicro). HDMI receiver Link Controller which is fully compliant with HDMI 1.4a specification. This offers a simple implementation for system on chip (SOC) for consumer electronics like HD-TV,AV receiver. Its performs most efficiently with our matching HDMI receiver PHY IP core. This HDMI core functions can be customized based on requirements.
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Tech Specs
Part Number | HDMI 1.4 Rx PHY IP in 65/55LP |
Short Description | HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 65/55LP |
Provider | |
Maturity | In Production |
Foundry | TSMC |
Geometry nm | 55, 65 |
Target Process Node | TSMC 65LP, TSMC 55LP |