The Veriest SPI to AMBA AHB Master Bridge Design IP offers a simple solution to provide "backdoor" access from external SPI master devices to the embedded AMBA AHB bus. The SPI to AMBA AHB Bridge utilizes a simple but effective protocol for reads and writes over the chip-embedded AMBA AHB. The SPI transactions are protected in both directions by a CRC checksum field The external SPI device can be a CPU such as a Tegra, OMAP or other similar device. Driver development for such devices to support the Veriest SPI to AMBA AHB Bridge is very simple.